From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from foss.arm.com (foss.arm.com [217.140.110.172]) by smtp.subspace.kernel.org (Postfix) with ESMTP id 998FF48AE04 for ; Tue, 5 May 2026 16:08:16 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=217.140.110.172 ARC-Seal:i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1777997298; cv=none; b=lCzM+r5NsgqcKt1d5+hGOVTWX2QjItRr1Lyil3tkY6WJR9IcxJ91twl4J3a+7bTBIA7HDbG5iDxqvuV/zv69nbNK0xRZrqCahQmtRMXpTRo2MXQn95llxZYp8qxNpfyFmpEF73h3sAFn//aIvqtROcAFS1kPuBhjlsqLFrhwLvU= ARC-Message-Signature:i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1777997298; c=relaxed/simple; bh=v82/1vPoSQuONG3WsQV7YwA6orY4PDGaaB1P1kQ48kU=; h=From:Date:Subject:MIME-Version:Content-Type:Message-Id:References: In-Reply-To:To:Cc; b=NbOrRZe6LmqNaeptXvEW+rO7HnHwbJ/H38AGCbWNCtqkkgbbwNUUGo4lS9ih8x+KzeuWS5WG51zuM6IAHNGDDMkhZB8Xln/SuUM30Mx36ve8mqS9RCXSduHpUtGxbG/GKmll/16sZjlK/QT1VN8PWCnCSyC27yl8iB+/3D+eP24= ARC-Authentication-Results:i=1; smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=arm.com; spf=pass smtp.mailfrom=arm.com; dkim=pass (1024-bit key) header.d=arm.com header.i=@arm.com header.b=fIdM1FwS; arc=none smtp.client-ip=217.140.110.172 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=arm.com Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=arm.com Authentication-Results: smtp.subspace.kernel.org; dkim=pass (1024-bit key) header.d=arm.com header.i=@arm.com header.b="fIdM1FwS" Received: from usa-sjc-imap-foss1.foss.arm.com (unknown [10.121.207.14]) by usa-sjc-mx-foss1.foss.arm.com (Postfix) with ESMTP id C866E2681; Tue, 5 May 2026 09:08:10 -0700 (PDT) Received: from localhost.localdomain (e123572-lin.cambridge.arm.com [10.1.194.54]) by usa-sjc-imap-foss1.foss.arm.com (Postfix) with ESMTPSA id 101713F763; Tue, 5 May 2026 09:08:11 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=simple/simple; d=arm.com; s=foss; t=1777997296; bh=v82/1vPoSQuONG3WsQV7YwA6orY4PDGaaB1P1kQ48kU=; h=From:Date:Subject:References:In-Reply-To:To:Cc:From; b=fIdM1FwSO2f6XGsJKrkG/VYHmwB0LijHUxa41oHHt+eexYWn/zSHVvFdi/WjIj5TC CKZbYJoEfEIPR0koypxMh7V++i2dVvWf/FB6mx+sHP3u1WjdfYY0GYSO1UNahW+wOC owgcTiwx2aUZTy4OMoYhxFACve5A/xPX1cLP8fHQ= From: Kevin Brodsky Date: Tue, 05 May 2026 17:06:05 +0100 Subject: [PATCH RFC v7 16/24] arm64: kpkeys: Implement arch_supports_kpkeys_early() Precedence: bulk X-Mailing-List: linux-hardening@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: 7bit Message-Id: <20260505-kpkeys-v7-16-20c0bdd97197@arm.com> References: <20260505-kpkeys-v7-0-20c0bdd97197@arm.com> In-Reply-To: <20260505-kpkeys-v7-0-20c0bdd97197@arm.com> To: linux-hardening@vger.kernel.org Cc: Kevin Brodsky , Andrew Morton , Andy Lutomirski , Catalin Marinas , Dave Hansen , "David Hildenbrand (Arm)" , Ira Weiny , Jann Horn , Jeff Xu , Joey Gouly , Kees Cook , Linus Walleij , Marc Zyngier , Mark Brown , Matthew Wilcox , Maxwell Bland , "Mike Rapoport (IBM)" , Peter Zijlstra , Pierre Langlois , Quentin Perret , Rick Edgecombe , Ryan Roberts , Will Deacon , Yang Shi , Yeoreum Yun , linux-arm-kernel@lists.infradead.org, linux-mm@kvack.org, x86@kernel.org, Lorenzo Stoakes , Thomas Gleixner , Vlastimil Babka X-Mailer: b4 0.15.2 X-Developer-Signature: v=1; a=ed25519-sha256; t=1777997220; l=1883; i=kevin.brodsky@arm.com; s=20260427; h=from:subject:message-id; bh=v82/1vPoSQuONG3WsQV7YwA6orY4PDGaaB1P1kQ48kU=; b=erbWwshOH5eSYbyBEexjjPp8WQMR4JDB9K29Hi1KltLPQNM9epNdeZRtpkGDFf1Qo50ePQwea Ds0xvNYDolDBUJxj2MoI7xnIpoGZ7cxQVtj2651ujEYLpq5wrnulAVd X-Developer-Key: i=kevin.brodsky@arm.com; a=ed25519; pk=N2QG+eJKrvkNovwhhwJhnJ4+ScVfsGCHldmqLfcMTFs= We need to check if the kpkeys_hardened_pgtables feature is going to be enabled very early during boot, to decide how to set up the linear map and how to allocate early page tables. This happens even before boot CPU features are detected. Implement the arch_supports_kpkeys_early() helper by directly checking if the boot CPU supports POE, if it is called before boot CPU features are detected. It may also be called later, in which case we simply check the POE feature. Signed-off-by: Kevin Brodsky --- arch/arm64/include/asm/cpufeature.h | 12 ++++++++++++ arch/arm64/include/asm/kpkeys.h | 7 +++++++ 2 files changed, 19 insertions(+) diff --git a/arch/arm64/include/asm/cpufeature.h b/arch/arm64/include/asm/cpufeature.h index 4de51f8d92cb..8722e9e62702 100644 --- a/arch/arm64/include/asm/cpufeature.h +++ b/arch/arm64/include/asm/cpufeature.h @@ -1078,6 +1078,18 @@ static inline bool cpu_has_lpa2(void) #endif } +static inline bool cpu_has_poe(void) +{ + u64 mmfr3; + + if (!IS_ENABLED(CONFIG_ARM64_POE)) + return false; + + mmfr3 = read_sysreg_s(SYS_ID_AA64MMFR3_EL1); + return cpuid_feature_extract_unsigned_field(mmfr3, + ID_AA64MMFR3_EL1_S1POE_SHIFT); +} + #endif /* __ASSEMBLER__ */ #endif diff --git a/arch/arm64/include/asm/kpkeys.h b/arch/arm64/include/asm/kpkeys.h index 7dad3532cacf..ea915f78936b 100644 --- a/arch/arm64/include/asm/kpkeys.h +++ b/arch/arm64/include/asm/kpkeys.h @@ -21,6 +21,13 @@ static inline bool arch_supports_kpkeys(void) return system_supports_poe(); } +static inline bool arch_supports_kpkeys_early(void) +{ + /* POE is a boot feature */ + return boot_capabilities_finalized() ? + system_supports_poe() : cpu_has_poe(); +} + #ifdef CONFIG_ARM64_POE static inline u64 por_set_kpkeys_context(u64 por, int ctx) -- 2.51.2