From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from foss.arm.com (foss.arm.com [217.140.110.172]) by smtp.subspace.kernel.org (Postfix) with ESMTP id B089947884D for ; Tue, 18 Aug 2026 14:11:37 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=217.140.110.172 ARC-Seal:i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1787062299; cv=none; b=KwXLBT52LL5geNce9/4oijuajoDKIlv392qOlTvCBk8cCZWweQzkkLgUNhjC58+Ahf7xpq4Py49DsvA0Nyo/NTFOcPa7YtkaC99PDHJQWRPLBBLntw/Rm4I4+T+SY0Ii+1eJ8Ca/eHpulKGEuppCG5O3/XEygMpm8sMNKBlPDMU= ARC-Message-Signature:i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1787062299; c=relaxed/simple; bh=hooPjsjsIbvprFGYibv5X1kiKmrNJ+rh2pNBQPPeZ1w=; h=From:Date:Subject:MIME-Version:Content-Type:Message-Id:References: In-Reply-To:To:Cc; b=SX7NZVL7qXGZv1UWtmRcjMZNNS+LLuYcncZH49JYx7E2GSYSjIapcX/yT15K+OvUKP+lM16GQCvtnq+xeq2VInGQzqzfECycEfTvzw9Uu919dqGdZ0cQb9VYDBOUeH2i+YXrPjQl1kZaPk2EWZ/FBymicni7GvCkAKyOZ9lUwuE= ARC-Authentication-Results:i=1; smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=arm.com; spf=pass smtp.mailfrom=arm.com; dkim=pass (1024-bit key) header.d=arm.com header.i=@arm.com header.b=cxBe9I9S; arc=none smtp.client-ip=217.140.110.172 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=arm.com Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=arm.com Authentication-Results: smtp.subspace.kernel.org; dkim=pass (1024-bit key) header.d=arm.com header.i=@arm.com header.b="cxBe9I9S" Received: from usa-sjc-imap-foss1.foss.arm.com (unknown [10.121.207.14]) by usa-sjc-mx-foss1.foss.arm.com (Postfix) with ESMTP id 251AF152B; Tue, 18 Aug 2026 07:11:33 -0700 (PDT) Received: from localhost.localdomain (e123572-lin.cambridge.arm.com [10.2.208.46]) by usa-sjc-imap-foss1.foss.arm.com (Postfix) with ESMTPSA id 631183F85F; Tue, 18 Aug 2026 07:11:32 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=simple/simple; d=arm.com; s=foss; t=1787062297; bh=hooPjsjsIbvprFGYibv5X1kiKmrNJ+rh2pNBQPPeZ1w=; h=From:Date:Subject:References:In-Reply-To:To:Cc:From; b=cxBe9I9ScYcoAOTS/OFjHAGQiqZgGNlGGBWkUdwU7WCHV6tU2ODTDMbfiWkk/zJFI kI5nzvHbO/BVLyhnpfk9SA1Xj1V45aKX8S1JDqUUcX5GE+w8D8NjfpXk1Y2rapTd3E 59k1tQjNecNSisDKU9/6nRV7i2uhAv1WRogEzlMg= From: Kevin Brodsky Date: Tue, 18 Aug 2026 15:08:45 +0100 Subject: [PATCH RFC v9 03/25] arm64: mm: Enable overlays for all EL1 indirect permissions Precedence: bulk X-Mailing-List: linux-hardening@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: 7bit Message-Id: <20260818-kpkeys-v9-3-743ad31b2c8f@arm.com> References: <20260818-kpkeys-v9-0-743ad31b2c8f@arm.com> In-Reply-To: <20260818-kpkeys-v9-0-743ad31b2c8f@arm.com> To: linux-hardening@vger.kernel.org Cc: Kevin Brodsky , Andrew Morton , Andy Lutomirski , Catalin Marinas , Dave Hansen , "David Hildenbrand (Arm)" , Jann Horn , Jeff Xu , Joey Gouly , Kees Cook , Linu Cherian , Linus Walleij , Marc Zyngier , Mark Brown , Matthew Wilcox , Maxwell Bland , "Mike Rapoport (IBM)" , Peter Zijlstra , Pierre Langlois , =?utf-8?q?Pierre-Cl=C3=A9ment_Tosi?= , Quentin Perret , Rick Edgecombe , Ryan Roberts , Vlastimil Babka , Will Deacon , Yang Shi , Yeoreum Yun , linux-arm-kernel@lists.infradead.org, linux-mm@kvack.org, x86@kernel.org, Ira Weiny , Lorenzo Stoakes , Thomas Gleixner X-Mailer: b4 0.15.2 X-Developer-Signature: v=1; a=ed25519-sha256; t=1787062276; l=1750; i=kevin.brodsky@arm.com; s=20260427; h=from:subject:message-id; bh=hooPjsjsIbvprFGYibv5X1kiKmrNJ+rh2pNBQPPeZ1w=; b=1dT1lR/GFlfvxoQ9U/r/5UWCPTPdNEIhZdGjKNljEItSAW0YGtPRacwISla75cwiUf8iE8VnY QXH2wDdZX6KAU8CDYSFW9KbkZLtQomPDKoRA8uGZOla8+9H532eoAgG X-Developer-Key: i=kevin.brodsky@arm.com; a=ed25519; pk=N2QG+eJKrvkNovwhhwJhnJ4+ScVfsGCHldmqLfcMTFs= In preparation of using POE inside the kernel, enable "Overlay applied" for kernel memory types in PIR_EL1. This ensures that the permissions set in POR_EL1 affect all kernel mappings. User memory types must be left untouched (overlays not applied) because any privileged access to user memory (e.g. futex atomic without FEAT_LSUI) would then be mistakenly checked against POR_EL1. Reviewed-by: David Hildenbrand (Arm) Signed-off-by: Kevin Brodsky --- arch/arm64/include/asm/pgtable-prot.h | 8 ++++---- 1 file changed, 4 insertions(+), 4 deletions(-) diff --git a/arch/arm64/include/asm/pgtable-prot.h b/arch/arm64/include/asm/pgtable-prot.h index 212ce1b02e15..d4d45ab86a5a 100644 --- a/arch/arm64/include/asm/pgtable-prot.h +++ b/arch/arm64/include/asm/pgtable-prot.h @@ -183,9 +183,9 @@ static inline bool __pure lpa2_is_enabled(void) PIRx_ELx_PERM_PREP(pte_pi_index(_PAGE_SHARED_EXEC), PIE_RW) | \ PIRx_ELx_PERM_PREP(pte_pi_index(_PAGE_READONLY), PIE_R) | \ PIRx_ELx_PERM_PREP(pte_pi_index(_PAGE_SHARED), PIE_RW) | \ - PIRx_ELx_PERM_PREP(pte_pi_index(_PAGE_KERNEL_ROX), PIE_RX) | \ - PIRx_ELx_PERM_PREP(pte_pi_index(_PAGE_KERNEL_EXEC), PIE_RWX) | \ - PIRx_ELx_PERM_PREP(pte_pi_index(_PAGE_KERNEL_RO), PIE_R) | \ - PIRx_ELx_PERM_PREP(pte_pi_index(_PAGE_KERNEL), PIE_RW)) + PIRx_ELx_PERM_PREP(pte_pi_index(_PAGE_KERNEL_ROX), PIE_RX_O) | \ + PIRx_ELx_PERM_PREP(pte_pi_index(_PAGE_KERNEL_EXEC), PIE_RWX_O) | \ + PIRx_ELx_PERM_PREP(pte_pi_index(_PAGE_KERNEL_RO), PIE_R_O) | \ + PIRx_ELx_PERM_PREP(pte_pi_index(_PAGE_KERNEL), PIE_RW_O)) #endif /* __ASM_PGTABLE_PROT_H */ -- 2.51.2