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From: Krzysztof Kozlowski <krzk@kernel.org>
To: Claudiu Beznea <claudiu.beznea@tuxon.dev>
Cc: vkoul@kernel.org, kishon@kernel.org, robh@kernel.org,
	krzk+dt@kernel.org, conor+dt@kernel.org, p.zabel@pengutronix.de,
	geert+renesas@glider.be, magnus.damm@gmail.com,
	yoshihiro.shimoda.uh@renesas.com, kees@kernel.org,
	gustavoars@kernel.org, biju.das.jz@bp.renesas.com,
	linux-phy@lists.infradead.org, devicetree@vger.kernel.org,
	linux-kernel@vger.kernel.org, linux-renesas-soc@vger.kernel.org,
	linux-hardening@vger.kernel.org, john.madieu.xa@bp.renesas.com,
	Claudiu Beznea <claudiu.beznea.uj@bp.renesas.com>
Subject: Re: [PATCH v3 05/12] dt-bindings: phy: renesas,usb2-phy: Add renesas,sysc-signals
Date: Thu, 22 May 2025 14:46:40 +0200	[thread overview]
Message-ID: <4a07048a-c55a-4fd3-b4e5-7f9d218de76f@kernel.org> (raw)
In-Reply-To: <b22e7a46-7e35-4840-aae3-a855c97fbde4@tuxon.dev>

On 22/05/2025 12:26, Claudiu Beznea wrote:
> Hi, Krzysztof,
> 
> On 22.05.2025 10:03, Krzysztof Kozlowski wrote:
>> On Wed, May 21, 2025 at 05:09:36PM GMT, Claudiu wrote:
>>>  .../bindings/phy/renesas,usb2-phy.yaml        | 22 +++++++++++++++++++
>>>  1 file changed, 22 insertions(+)
>>>
>>> diff --git a/Documentation/devicetree/bindings/phy/renesas,usb2-phy.yaml b/Documentation/devicetree/bindings/phy/renesas,usb2-phy.yaml
>>> index 12f8d5d8af55..e1e773cba847 100644
>>> --- a/Documentation/devicetree/bindings/phy/renesas,usb2-phy.yaml
>>> +++ b/Documentation/devicetree/bindings/phy/renesas,usb2-phy.yaml
>>> @@ -86,6 +86,16 @@ properties:
>>>  
>>>    dr_mode: true
>>>  
>>> +  renesas,sysc-signals:
>>> +    description: System controller phandle, specifying the register
>>> +      offset and bitmask associated with a specific system controller signal
>>
>> This is 100% redundant information. system controller specifying system
>> controller signal.
>>
>> Drop.
>>
>>
>>> +    $ref: /schemas/types.yaml#/definitions/phandle-array
>>> +    items:
>>> +      - items:
>>> +          - description: system controller phandle
>>
>> What for? Explain the usage. How is ut used by this hardware.
> 
> OK, I though I've explained in the renesas,sysc-signals description
> section. I'll adjust it and move it here.

That description did not explain me at all. I mean really, which parts
explains the usage by hardware?


> 
>>
>>> +          - description: register offset associated with a signal
>>
>> What signal? That's a phy.
> 
> Would you like me to specify here exactly the signal name? I tried to made
> it generic as the system controller provides other signals to other IPs,
> the intention was to use the same property for other IPs, if any. And kept
> it generic in the idea it could be used in future, if any, for other
> signals provided by the system controller to the USB PHY.

Bindings are not generic, so yes, you must explain here what hardware
aspect this is relevant to. What signal? Between whom?

> 
> As explained in the commit description, on the Renesas RZ/G3S SoC, the USB
> PHY receives a signal from the system controller that need to be

Interrupt? Some pin changes state? What is a signal? This property is in
the USB PHY device, not system controller.

> de-asserted/asserted when power is turned on/off. This signal, called
> PWRRDY, is controlled through a specific register in the system controller
> memory space.
> 
> With this property the intention is to specify to the USB PHY driver the
> phandle to the SYSC, register offset within SYSC address space in charge of

This is obvious from the schema and I asked to drop redundant parts.

> controlling the USB PWRRDY signal and the bitmask within this register.

So basically this last piece describes what this hardware needs to do
with system controller? Change some register?

> 
> The PHY driver parse this information and set the signal at proper moments.
> 
> 
>>
>>> +          - description: register bitmask associated with a signal
>>> +
>>>  if:
>>>    properties:
>>>      compatible:
>>> @@ -117,6 +127,18 @@ allOf:
>>>        required:
>>>          - resets
>>>  
>>> +  - if:
>>> +      properties:
>>> +        compatible:
>>> +          contains:
>>> +            const: renesas,usb2-phy-r9a08g045
>>> +    then:
>>> +      required:
>>> +        - renesas,sysc-signals
>>
>> That's ABI break.
> 
> There is no in kernel device tree users of "renesas,usb2-phy-r9a08g045"
> compatible. It is introduced in patch 11/12 from this series. With this do
> you still consider it ABI break?

Then this patch cannot be split from binding introducing the user. Don't
add unused/undocumented compatibles.



Best regards,
Krzysztof

  reply	other threads:[~2025-05-22 12:46 UTC|newest]

Thread overview: 22+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2025-05-21 14:09 [PATCH v3 00/12] Add initial USB support for the Renesas RZ/G3S SoC Claudiu
2025-05-21 14:09 ` [PATCH v3 01/12] soc: renesas: rz-sysc: Add syscon/regmap support Claudiu
2025-05-21 14:09 ` [PATCH v3 02/12] soc: renesas: rz-sysc: Add signal support Claudiu
2025-05-21 14:09 ` [PATCH v3 03/12] soc: renesas: r9a08g045-sysc: Add USB PWRRDY signal Claudiu
2025-05-21 14:09 ` [PATCH v3 04/12] dt-bindings: phy: renesas,usb2-phy: Mark resets as required for RZ/G3S Claudiu
2025-05-21 14:09 ` [PATCH v3 05/12] dt-bindings: phy: renesas,usb2-phy: Add renesas,sysc-signals Claudiu
2025-05-22  7:03   ` Krzysztof Kozlowski
2025-05-22 10:26     ` Claudiu Beznea
2025-05-22 12:46       ` Krzysztof Kozlowski [this message]
2025-05-22 12:48         ` Krzysztof Kozlowski
2025-05-22 14:39           ` Claudiu Beznea
2025-05-22 14:49             ` Krzysztof Kozlowski
2025-05-22 14:38         ` Claudiu Beznea
2025-05-21 14:09 ` [PATCH v3 06/12] phy: renesas: rcar-gen3-usb2: Fix an error handling path in rcar_gen3_phy_usb2_probe() Claudiu
2025-05-21 14:09 ` [PATCH v3 07/12] phy: renesas: rcar-gen3-usb2: Add support for USB PWRRDY signal Claudiu
2025-05-21 14:09 ` [PATCH v3 08/12] reset: rzg2l-usbphy-ctrl: " Claudiu
2025-05-22 11:29   ` kernel test robot
2025-05-21 14:09 ` [PATCH v3 09/12] dt-bindings: reset: renesas,rzg2l-usbphy-ctrl: Document RZ/G3S support Claudiu
2025-05-22  7:05   ` Krzysztof Kozlowski
2025-05-21 14:09 ` [PATCH v3 10/12] reset: rzg2l-usbphy-ctrl: Add support for RZ/G3S SoC Claudiu
2025-05-21 14:09 ` [PATCH v3 11/12] arm64: dts: renesas: r9a08g045: Add USB support Claudiu
2025-05-21 14:09 ` [PATCH v3 12/12] arm64: dts: renesas: rzg3s-smarc: Enable " Claudiu

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