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Mon, 12 Oct 2026 09:02:23 -0700 (PDT) X-Received: by 2002:a05:620a:199b:b0:939:eb09:4458 with SMTP id af79cd13be357-93ebd1de450mr2035460985a.3.1791820943171; Mon, 12 Oct 2026 09:02:23 -0700 (PDT) Received: from [192.168.226.26] ([178.235.128.140]) by smtp.gmail.com with ESMTPSA id 4fb4d7f45d1cf-6b1bbb3fbc6sm1758143a12.29.2026.10.12.09.02.20 (version=TLS1_3 cipher=TLS_AES_128_GCM_SHA256 bits=128/128); Mon, 12 Oct 2026 09:02:21 -0700 (PDT) Message-ID: <51552a90-60bd-4b87-8bc6-080d49e030d6@oss.qualcomm.com> Date: Mon, 12 Oct 2026 18:02:19 +0200 Precedence: bulk X-Mailing-List: linux-hardening@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 User-Agent: Mozilla Thunderbird Subject: Re: [PATCH v3 3/4] arm64: dts: qcom: define a fixed 25 MHz clock To: Alex Elder , sboyd@kernel.org, bmasney+clk@redhat.com, jbrunet+clk@baylibre.com, robh@kernel.org, krzk+dt@kernel.org, conor+dt@kernel.org, andersson@kernel.org, konradybcio@kernel.org Cc: abelvesa@kernel.org, kees@kernel.org, gustavoars@kernel.org, mohd.anwar@oss.qualcomm.com, lorenzo.bianconi@oss.qualcomm.com, danielt@kernel.org, linux-clk@vger.kernel.org, devicetree@vger.kernel.org, linux-arm-msm@vger.kernel.org, linux-hardening@vger.kernel.org, linux-kernel@vger.kernel.org, Daniel Thompson References: <20261012152408.3729237-1-elder@riscstar.com> <20261012152408.3729237-4-elder@riscstar.com> Content-Language: en-US From: Konrad Dybcio In-Reply-To: <20261012152408.3729237-4-elder@riscstar.com> Content-Type: text/plain; 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Add it > to the definition associated with the chip. > > Co-developed-by: Daniel Thompson > Signed-off-by: Daniel Thompson > Signed-off-by: Alex Elder > --- > v3: - New patch in this version of the series > > arch/arm64/boot/dts/qcom/qcs6490-rb3gen2.dts | 6 ++++++ > 1 file changed, 6 insertions(+) > > diff --git a/arch/arm64/boot/dts/qcom/qcs6490-rb3gen2.dts b/arch/arm64/boot/dts/qcom/qcs6490-rb3gen2.dts > index 0e3bbdaf4661f..b8d290eed2f38 100644 > --- a/arch/arm64/boot/dts/qcom/qcs6490-rb3gen2.dts > +++ b/arch/arm64/boot/dts/qcom/qcs6490-rb3gen2.dts > @@ -891,6 +891,12 @@ pcie@0,0 { > pinctrl-0 = <&tc9563_resx_n>; > pinctrl-names = "default"; > > + clock-25000000 { > + compatible = "fixed-clock"; > + #clock-cells = <0>; > + clock-frequency = <25000000>; > + }; This and patch 4 should be squashed Konrad