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Thu, 16 Jan 2025 06:33:20 +0000 Date: Wed, 15 Jan 2025 22:33:17 -0800 From: Dan Williams To: Alejandro Lucero Palau , Dan Williams , Ira Weiny , Dave Jiang , Fan Ni , Jonathan Cameron , Jonathan Corbet , "Andrew Morton" , Kees Cook , "Gustavo A. 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Silva" CC: Davidlohr Bueso , Alison Schofield , Vishal Verma , , , , , , Li Ming Subject: Re: [PATCH v8 02/21] cxl/mem: Read dynamic capacity configuration from the device Message-ID: <6788a82d2455a_20fa294b2@dwillia2-xfh.jf.intel.com.notmuch> References: <20241210-dcd-type2-upstream-v8-0-812852504400@intel.com> <20241210-dcd-type2-upstream-v8-2-812852504400@intel.com> <67871f05cd767_20f32947f@dwillia2-xfh.jf.intel.com.notmuch> <469ac491-8733-986a-aaae-768ec28ebbec@amd.com> Content-Type: text/plain; charset="us-ascii" Content-Disposition: inline In-Reply-To: <469ac491-8733-986a-aaae-768ec28ebbec@amd.com> X-ClientProxiedBy: MW4PR03CA0287.namprd03.prod.outlook.com (2603:10b6:303:b5::22) To PH8PR11MB8107.namprd11.prod.outlook.com (2603:10b6:510:256::6) Precedence: bulk X-Mailing-List: linux-hardening@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 X-MS-PublicTrafficType: Email X-MS-TrafficTypeDiagnostic: PH8PR11MB8107:EE_|SN7PR11MB8284:EE_ X-MS-Office365-Filtering-Correlation-Id: 3b1a30ff-e25d-42d1-e0e1-08dd35f7ab0a X-LD-Processed: 46c98d88-e344-4ed4-8496-4ed7712e255d,ExtAddr X-MS-Exchange-SenderADCheck: 1 X-MS-Exchange-AntiSpam-Relay: 0 X-Microsoft-Antispam: BCL:0;ARA:13230040|7416014|376014|1800799024|366016|921020; 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X-MS-Exchange-AntiSpam-MessageData-ChunkCount: 1 X-MS-Exchange-AntiSpam-MessageData-0: =?us-ascii?Q?3zk3UHKvHmnqrQ+CZ97JZtnfqEbaRYXQD2kGo9CJsqqkf4B6HumGvFN1pVWX?= =?us-ascii?Q?HL5DoUHofqTyvC/3LYbG5rp1vJ4s6N1A/v/E1uvYoAKtz7A7GaE7ki7EhB4B?= =?us-ascii?Q?aXu+Zsl2XuEgx4vZi37TbzINj/Q7/shSyP0XWAYwLc/CIoyByAbpH/NnYa/J?= =?us-ascii?Q?2xkIPaH5pnpBSZYxkB3w4BslQdjq4cNgicaF2vrAF0f7a8xZNm1Fhl3uS2+a?= =?us-ascii?Q?PplnkX2OGhffFvjjwS+kxes0Eke8tC7JknMeXf2CdBTQh7QFOrF+Akv1JFd6?= =?us-ascii?Q?N0JjZZE9Bx0P2kp2kv5uQxwW92qk1muKJWmMC7mqr23YSRbbGqY4ff4iIteJ?= =?us-ascii?Q?rFZ4g+CyY/rqtwJ8DvB16DVShFkrgcEdaRULrx0a17V7HByi+YuzxsGVCgoK?= =?us-ascii?Q?8oVOkI7CQXj3kjeJkkkA0fJKOmQMPTtMPUrXhtvcp03TDg85y9t6ZDyVulRt?= =?us-ascii?Q?mW5Tn2zgV3EKA38iP6ejG0zNL3bOYB00sa73ZmIMZQSBj9qNlcJviTsqt7vG?= =?us-ascii?Q?N9lVTHPHy+LArdPv/96HAOxh7MBYHP9Y+xh9XaKS0cTbJyydFgfVVxo1p/BN?= =?us-ascii?Q?iW7YOVj1D0aKubvB+hZKhK3yb5cEQSnHmAJyFobqa2bFIwusixaAlAg40mAo?= =?us-ascii?Q?cAy9X0+OvwcKnjGM6dRJRXWtTrPA8KMr/+sTCehVsO4zGXsAbectUoLKym41?= =?us-ascii?Q?eV2a+Md6/kKYpsphZxkfOykxDSNPHsWzMPB7mMueCi/pubo7tUqaJAR/Jl7T?= =?us-ascii?Q?6/YS9K+9Ev5Sary36Pdrp1VhtxeNUBG7ee1kdmx6kjQjNTbB219SLL0aKLuH?= =?us-ascii?Q?AKWgZLTJFA+5TFx4VOkx5kIpKSkohtPNVV54fSVgNoCSFRaw7GX2kluMQbgQ?= =?us-ascii?Q?pcmamGQgwWk4lTXXhQm9gLWo/f6PsSXAQ4/N71c308pSIcCJiBEyMxDv3AfD?= =?us-ascii?Q?H6D1TkeBXL+Qi2AjCXu0udbBiLe8pz2HESPD9qQFvDdhGHKtFtSVd1lCCo24?= =?us-ascii?Q?mazZld5eSX+d4M0sDK83Spn1vzWr4emUOgu0ylUUjI7y5KT6Kfq+ADUsKuHq?= =?us-ascii?Q?84ouk44lhzZd1YwCE5SzroTcZ8djlG8Ht3qbMffyvZwNtylCq0BwZKUqClzX?= =?us-ascii?Q?7TfAnjJO8JUjfuOdvBzze/L9bK7IAuxVHYmtp0DRVmDRHYTSCK1Q+L7Nu+1Z?= =?us-ascii?Q?VxTAqu8ZvHMdYVR9fejWHtIm5he5rhJU7+Pa+CVNWj6+ZSSjHKF8uzSvf3wr?= =?us-ascii?Q?P3YtDMOtrmxdH35fFlhqNiOrhV+4YNVXRhWkNiRz5UJLqkTzs6U9UqWD54yf?= =?us-ascii?Q?+6gu9y0sSaNV9NiWNINHuqICiorYDR0ilHMBw2w3YkqcRCTdQD7EbbVsFB75?= =?us-ascii?Q?XOrjeTrDWaV07gZ95kwnfX3Cn8u2ulBq2mj9M0rSsKKOxI0n95s2aCHlOG4k?= =?us-ascii?Q?ZNPqq2eTDu7IXyRZjkp+k0/gJs2dM55cB0JmlPQZ+wqDIHTnzG8cZAd90QLQ?= =?us-ascii?Q?nrJPXmRE7STgaKP/U4ecyymyWhBOnh5LTVhLppYOSkvo+fIg54VejwVmso/B?= =?us-ascii?Q?OWDDTfSG4y5A+mzN/uo+bfqwUeb7HUyHvKJq0v+a0oqAr/kf0my1Ov3Vsml7?= =?us-ascii?Q?mQ=3D=3D?= X-MS-Exchange-CrossTenant-Network-Message-Id: 3b1a30ff-e25d-42d1-e0e1-08dd35f7ab0a X-MS-Exchange-CrossTenant-AuthSource: PH8PR11MB8107.namprd11.prod.outlook.com X-MS-Exchange-CrossTenant-AuthAs: Internal X-MS-Exchange-CrossTenant-OriginalArrivalTime: 16 Jan 2025 06:33:20.0501 (UTC) X-MS-Exchange-CrossTenant-FromEntityHeader: Hosted X-MS-Exchange-CrossTenant-Id: 46c98d88-e344-4ed4-8496-4ed7712e255d X-MS-Exchange-CrossTenant-MailboxType: HOSTED X-MS-Exchange-CrossTenant-UserPrincipalName: nFXNCqmu3GmnJ0O/lfS+4PGpTDbFA8jwUN3YdDOSd/jfRLrjPZ1GBN8HmYhy6FR6O0sKLu4X2LblQ0Y2+zgHFs6O71806Rxy/IqajsTd7Hg= X-MS-Exchange-Transport-CrossTenantHeadersStamped: SN7PR11MB8284 X-OriginatorOrg: intel.com Alejandro Lucero Palau wrote: > > On 1/15/25 02:35, Dan Williams wrote: > > Ira Weiny wrote: > >> Devices which optionally support Dynamic Capacity (DC) are configured > >> via mailbox commands. CXL 3.1 requires the host to issue the Get DC > >> Configuration command in order to properly configure DCDs. Without the > >> Get DC Configuration command DCD can't be supported. > >> > >> Implement the DC mailbox commands as specified in CXL 3.1 section > >> 8.2.9.9.9 (opcodes 48XXh) to read and store the DCD configuration > >> information. Disable DCD if DCD is not supported. Leverage the Get DC > >> Configuration command supported bit to indicate if DCD is supported. > >> > >> Linux has no use for the trailing fields of the Get Dynamic Capacity > >> Configuration Output Payload (Total number of supported extents, number > >> of available extents, total number of supported tags, and number of > >> available tags). Avoid defining those fields to use the more useful > >> dynamic C array. > >> > >> Based on an original patch by Navneet Singh. > >> > >> Cc: Li Ming > >> Cc: Kees Cook > >> Cc: Gustavo A. R. Silva > >> Cc: linux-hardening@vger.kernel.org > >> Reviewed-by: Jonathan Cameron > >> Signed-off-by: Ira Weiny > >> > >> --- > >> Changes: > >> [iweiny: fix EXPORT_SYMBOL_NS_GPL(cxl_dev_dynamic_capacity_identify)] > >> [iweiny: limit variable scope in cxl_dev_dynamic_capacity_identify] > >> --- > >> drivers/cxl/core/mbox.c | 166 +++++++++++++++++++++++++++++++++++++++++++++++- > >> drivers/cxl/cxlmem.h | 64 ++++++++++++++++++- > >> drivers/cxl/pci.c | 4 ++ > >> 3 files changed, 232 insertions(+), 2 deletions(-) > >> > > [snipping the C code to do a data structure review first] > > > >> diff --git a/drivers/cxl/cxlmem.h b/drivers/cxl/cxlmem.h > >> index e8907c403edbd83c8a36b8d013c6bc3391207ee6..05a0718aea73b3b2a02c608bae198eac7c462523 100644 > >> --- a/drivers/cxl/cxlmem.h > >> +++ b/drivers/cxl/cxlmem.h > >> @@ -403,6 +403,7 @@ enum cxl_devtype { > >> CXL_DEVTYPE_CLASSMEM, > >> }; > >> > >> +#define CXL_MAX_DC_REGION 8 > > Please no, lets not sign up to have the "which cxl 'region' concept are > > you referring to?" debate in perpetuity. "DPA partition", "DPA > > resource", "DPA capacity" anything but "region". > > > > > > This next comment is not my main point to discuss in this email > (resources initialization is), but I seize it for giving my view in this > one. > > Dan, you say later we (Linux) are not obligated to use "questionable > naming decisions of specifications", but we should not confuse people > either. > > Maybe CXL_MAX_DC_HW_REGION would help here, for differentiating it from > the kernel software cxl region construct. I think we will need a CXL > kernel dictionary sooner or later ... I addressed this on the reply to Ira, and yes one of the first entries in a Linux CXL terminology document is that "regions" are mapped memory and partitions are DPA capacity. > >> /** > >> * struct cxl_dpa_perf - DPA performance property entry > >> * @dpa_range: range for DPA address > >> @@ -434,6 +435,8 @@ struct cxl_dpa_perf { > >> * @dpa_res: Overall DPA resource tree for the device > >> * @pmem_res: Active Persistent memory capacity configuration > >> * @ram_res: Active Volatile memory capacity configuration > >> + * @dc_res: Active Dynamic Capacity memory configuration for each possible > >> + * region > >> * @serial: PCIe Device Serial Number > >> * @type: Generic Memory Class device or Vendor Specific Memory device > >> * @cxl_mbox: CXL mailbox context > >> @@ -449,11 +452,23 @@ struct cxl_dev_state { > >> struct resource dpa_res; > >> struct resource pmem_res; > >> struct resource ram_res; > >> + struct resource dc_res[CXL_MAX_DC_REGION]; > > This is throwing off cargo-cult alarms. The named pmem_res and ram_res > > served us well up until the point where DPA partitions grew past 2 types > > at well defined locations. I like the array of resources idea, but that > > begs the question why not put all partition information into an array? > > > > This would also head off complications later on in this series where the > > DPA capacity reservation and allocation flows have "dc" sidecars bolted > > on rather than general semantics like "allocating from partition index N > > means that all partitions indices less than N need to be skipped and > > marked reserved". > > > I guess this is likely how you want to change the type2 resource > initialization issue and where I'm afraid these two patchsets are going > to collide at. > > If that is the case, both are going to miss the next kernel cycle since > it means major changes, but let's discuss it without further delays for > the sake of implementing the accepted changes as soon as possible, and I > guess with a close sync between Ira and I. Type-2, as far as I can see, is a priority because it is in support of a real device that end users can get their hands on today, right? DCD, as far as I know, has no known product intercepts, just QEMU emulation. So there is no rush there. If someone has information to the contrary please share, if able. The Type-2 series can also be prioritized because it is something we can get done without cross-subsystem entanglements. So, no I do not think the door is closed on Type-2 for v6.14, but it is certainly close which is why I am throwing out code suggestions along with the review. Otherwise, when 2 patch series trip over the same design wart (i.e. the no longer suitable explicit ->ram_res and ->pmem_res members of 'struct cxl_dev_state'), the cleanup needs to come first. > BTW, in the case of the Type2, there are more things to discuss which I > do there. Yes, hopefully it goes smoother after this point.