From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from smtp.kernel.org (aws-us-west-2-korg-mail-1.web.codeaurora.org [10.30.226.201]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id AD09A1F55F8; Tue, 6 May 2025 11:06:49 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=10.30.226.201 ARC-Seal:i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1746529609; cv=none; b=mR9gcOL+Vv0Qct5s4bg20qanyDR0bPa+R2HVaCktQvU2P+iLOpzJuYzjtVsz1NZvhGT629kcCnMOat4f0OLvR7FOhYYNeaCyFvpsS4XnflptXzzAXrmbT2DUG9SvEPpIRDNTaseotVYzhczCVR5enbIHwios870pUrTWiKES4KA= ARC-Message-Signature:i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1746529609; c=relaxed/simple; bh=IsJ4knD6xjH5ocv5Yne+kV9PRiqyTgJ8O5upyfZ3XeI=; h=Message-ID:Date:MIME-Version:Subject:To:Cc:References:From: In-Reply-To:Content-Type; b=K/7U+OncLlRLCDxzw9RQ0qAa/s6QEvLyzx+w32ucaeQEsSok2bma6xmKZTfSLxr3M5q6fCgyYcsO8KDc4yvJspei8NOhhMVJgrqZK3FCxOAIPLnEgquqdYfyHZvjpkSGDy3yVVTB/91zFDOU/b8ehSC51earX9wdiN2LXGwQXU4= ARC-Authentication-Results:i=1; smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=kernel.org header.i=@kernel.org header.b=VHspKYof; arc=none smtp.client-ip=10.30.226.201 Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=kernel.org header.i=@kernel.org header.b="VHspKYof" Received: by smtp.kernel.org (Postfix) with ESMTPSA id C4103C4CEE4; Tue, 6 May 2025 11:06:44 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=kernel.org; s=k20201202; t=1746529609; bh=IsJ4knD6xjH5ocv5Yne+kV9PRiqyTgJ8O5upyfZ3XeI=; h=Date:Subject:To:Cc:References:From:In-Reply-To:From; b=VHspKYofF/Nbn6SlNqc2bfQfo93MlLP2GC3foMiOYd3Eiklnd7rPNpcz52HrTTAxA RyOMCgF2bin4Y8P0OrTQIb5EQeEgkHW3+gQzPvDMY4AMlhLwZHRf3dzgiDVuKQtI9n Xbvo2y8+aEPxn7KaGqIDiWQHWVwgGaUi7DKj6ygp32Gq4/ERY+0i+etHbnoRVXX2gM t0LIY7mrqL7hfNKX7G7DVo6vTecO+n4f5Nr3XCkjDW29nYsmTunY0y+nhh9uvh1Dga fTUu5paF0JAum7VGi/TnSR2miv1EvODG+xg2kAAWzlMhfOdeoKOtfYwyjPuUHemdFe 5TeIRD8PRCSRQ== Message-ID: <9015e10e-effb-4dc8-b100-1906db731f57@kernel.org> Date: Tue, 6 May 2025 13:06:42 +0200 Precedence: bulk X-Mailing-List: linux-hardening@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 User-Agent: Mozilla Thunderbird Subject: Re: [PATCH 1/2] dt-bindings: pinctrl: eswin: Document for eic7700 SoC To: luyulin , linus.walleij@linaro.org, robh@kernel.org, krzk+dt@kernel.org, conor+dt@kernel.org, linux-gpio@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, kees@kernel.org, gustavoars@kernel.org, brgl@bgdev.pl, linux-hardening@vger.kernel.org Cc: zhengyu@eswincomputing.com, ningyu@eswincomputing.com, huangyifeng@eswincomputing.com, linmin@eswincomputing.com, fenglin@eswincomputing.com, lianghujun@eswincomputing.com, Samuel Holland References: <20250506090844.1516-1-luyulin@eswincomputing.com> <20250506091145.1953-1-luyulin@eswincomputing.com> From: Krzysztof Kozlowski Content-Language: en-US Autocrypt: addr=krzk@kernel.org; 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charset=UTF-8 Content-Transfer-Encoding: 7bit On 06/05/2025 11:11, luyulin wrote: > This commit adds Device Tree binding documentation for the Please do not use "This commit/patch/change", but imperative mood. See longer explanation here: https://elixir.bootlin.com/linux/v5.17.1/source/Documentation/process/submitting-patches.rst#L95 > ESWIN EIC7700 pinctrl controller module. The document describes > the required properties, compatible strings, and usage examples > in the device tree configuration when applying this module. Do not explain what DT binding is. We all know. Explain the hardware. See also other comits as examples. > > Co-developed-by: Samuel Holland > Signed-off-by: Samuel Holland > Signed-off-by: luyulin Looks like you used login name as full name. Use rather latin transcription or your name in your native language. > --- > .../pinctrl/eswin,eic7700-pinctrl.yaml | 156 ++++++++++++++++++ This was already send and reviewed. Implement previous feedback https://lore.kernel.org/all/20250326-owl-of-algebraic-wealth-61aeda@krzk-bin/ Then please version your patches correctly, e.g. use b4 or git format-patch -vX, and add changelog in cover letter or under '---' of individual patches describing changes from previous version. > 1 file changed, 156 insertions(+) > create mode 100644 Documentation/devicetree/bindings/pinctrl/eswin,eic7700-pinctrl.yaml > > diff --git a/Documentation/devicetree/bindings/pinctrl/eswin,eic7700-pinctrl.yaml b/Documentation/devicetree/bindings/pinctrl/eswin,eic7700-pinctrl.yaml > new file mode 100644 > index 000000000000..d8811a8e0a51 > --- /dev/null > +++ b/Documentation/devicetree/bindings/pinctrl/eswin,eic7700-pinctrl.yaml > @@ -0,0 +1,156 @@ > +# SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause > +%YAML 1.2 > +--- > +$id: http://devicetree.org/schemas/pinctrl/eswin,eic7700-pinctrl.yaml# > +$schema: http://devicetree.org/meta-schemas/core.yaml# > + > +title: Eswin Eic7700 Pinctrl > + > +maintainers: > + - LuYuLin > + > +description: | > + Please refer to pinctrl-bindings.txt in this directory for details of the > + common pinctrl bindings used by client devices, including the meaning of the > + phrase "pin configuration node". Drop this paragraph, redundant. > + > + eic7700 pin configuration nodes act as a container for an arbitrary number of > + subnodes. Each of these subnodes represents some desired configuration for one or > + more pins. This configuration can include the mux function to select on those pin(s), > + and various pin configuration parameters, such as input-enable, pull-up, etc. > + > +properties: > + compatible: > + const: eswin,eic7700-pinctrl > + > + reg: > + description: Specifies the base address and size of the SLCR space. Drop description, redundant. > + maxItems: 1 > + > + "vrgmii-supply": Open existing bindings. Do you see any property written like that? No, therefore do not come with own syntax, Drop quotes, > + description: > + Regulator supply for the RGMII interface IO power domain. > + This property should reference a regulator that provides either 1.8V or 3.3V, > + depending on the board-level voltage configuration required by the RGMII interface. > + > +patternProperties: > + '^(.*-)?(pins)$': Weirdly complicated pattern. Why not just "-pins$"? For which case do you need "pins" name? > + type: object > + description: > + Pinctrl node's client devices use subnodes for pin muxes, > + which in turn use below standard properties. > + > + properties: > + pins: > + description: > + For eic7700, specifies the name(s) of one or more pins to be configured by > + this node. > + items: > + enum: [ chip_mode, mode_set0, mode_set1, mode_set2, mode_set3, xin, > + rst_out_n, key_reset_n, gpio0, por_sel, jtag0_tck, jtag0_tms, > + jtag0_tdi, jtag0_tdo, gpio5, spi2_cs0_n, jtag1_tck, jtag1_tms, > + jtag1_tdi, jtag1_tdo, gpio11, spi2_cs1_n, pcie_clkreq_n, > + pcie_wake_n, pcie_perst_n, hdmi_scl, hdmi_sda, hdmi_cec, > + jtag2_trst, rgmii0_clk_125, rgmii0_txen, rgmii0_txclk, > + rgmii0_txd0, rgmii0_txd1, rgmii0_txd2, rgmii0_txd3, i2s0_bclk, > + i2s0_wclk, i2s0_sdi, i2s0_sdo, i2s_mclk, rgmii0_rxclk, > + rgmii0_rxdv, rgmii0_rxd0, rgmii0_rxd1, rgmii0_rxd2, rgmii0_rxd3, > + i2s2_bclk, i2s2_wclk, i2s2_sdi, i2s2_sdo, gpio27, gpio28, gpio29, > + rgmii0_mdc, rgmii0_mdio, rgmii0_intb, rgmii1_clk_125, rgmii1_txen, > + rgmii1_txclk, rgmii1_txd0, rgmii1_txd1, rgmii1_txd2, rgmii1_txd3, > + i2s1_bclk, i2s1_wclk, i2s1_sdi, i2s1_sdo, gpio34, rgmii1_rxclk, > + rgmii1_rxdv, rgmii1_rxd0, rgmii1_rxd1, rgmii1_rxd2, rgmii1_rxd3, > + spi1_cs0_n, spi1_clk, spi1_d0, spi1_d1, spi1_d2, spi1_d3, spi1_cs1_n, > + rgmii1_mdc, rgmii1_mdio, rgmii1_intb, usb0_pwren, usb1_pwren, > + i2c0_scl, i2c0_sda, i2c1_scl, i2c1_sda, i2c2_scl, i2c2_sda, > + i2c3_scl, i2c3_sda, i2c4_scl, i2c4_sda, i2c5_scl, i2c5_sda, > + uart0_tx, uart0_rx, uart1_tx, uart1_rx, uart1_cts, uart1_rts, > + uart2_tx, uart2_rx, jtag2_tck, jtag2_tms, jtag2_tdi, jtag2_tdo, > + fan_pwm, fan_tach, mipi_csi0_xvs, mipi_csi0_xhs, mipi_csi0_mclk, > + mipi_csi1_xvs, mipi_csi1_xhs, mipi_csi1_mclk, mipi_csi2_xvs, > + mipi_csi2_xhs, mipi_csi2_mclk, mipi_csi3_xvs, mipi_csi3_xhs, > + mipi_csi3_mclk, mipi_csi4_xvs, mipi_csi4_xhs, mipi_csi4_mclk, > + mipi_csi5_xvs, mipi_csi5_xhs, mipi_csi5_mclk, spi3_cs_n, spi3_clk, > + spi3_di, spi3_do, gpio92, gpio93, s_mode, gpio95, spi0_cs_n, > + spi0_clk, spi0_d0, spi0_d1, spi0_d2, spi0_d3, i2c10_scl, > + i2c10_sda, i2c11_scl, i2c11_sda, gpio106, boot_sel0, boot_sel1, > + boot_sel2, boot_sel3, gpio111, lpddr_ref_clk ] > + > + function: > + description: > + Specify the alternative function to be configured for the > + given pins. > + enum: [ disabled, boot_sel, chip_mode, emmc, fan_tach, > + gpio, hdmi, i2c, i2s, jtag, ddr_ref_clk_sel, > + lpddr_ref_clk, mipi_csi, osc, pcie, pwm, > + rgmii, reset, sata, sdio, spi, s_mode, uart, usb ] > + > + input-schmitt-enable: true > + > + input-schmitt-disable: true > + > + bias-disable: true > + > + bias-pull-down: true > + > + bias-pull-up: true > + > + input-enable: true > + > + input-disable: true > + > + drive-strength-microamp: true > + > + allOf: > + - $ref: pincfg-node.yaml# > + - $ref: pinmux-node.yaml# > + > + - if: > + properties: > + pins: > + anyOf: > + - pattern: '^rgmii' > + - const: lpddr_ref_clk > + then: > + properties: > + drive-strength-microamp: > + enum: [3000, 6000, 9000, 12000, 15000, 18000, 21000, 24000] > + else: > + properties: > + drive-strength-microamp: > + enum: [6000, 9000, 12000, 15000, 18000, 21000, 24000, 27000] > + > + required: > + - pins > + > + additionalProperties: false > + > +allOf: > + - $ref: pinctrl.yaml# > + > +required: > + - compatible > + - reg > + > +additionalProperties: false > + > +examples: > + - | > + pinctrl@51600080 { > + compatible = "eswin,eic7700-pinctrl"; > + reg = <0x51600080 0x1fff80>; > + vrgmii-supply = <&vcc_1v8>; > + gpio10_pins: gpio10-pins { Drop label. > + pins = "jtag1_tdo"; > + function = "gpio"; > + input-enable; > + bias-pull-up; > + }; > + }; > + > + i2c2 { Drop this node, not relevant. Best regards, Krzysztof