Re: [Pcihpd-discuss] Fwd: what is the pcie capability base for a configure process

Re: [Pcihpd-discuss] Fwd: what is the pcie capability base for a configure process

[Matthew Wilcox]

On Mon, May 29, 2006 at 11:30:07AM +0800, william wallace wrote:
>      I am  reading ur code for pcie configuration registers and
> configuration process for linux kenerl 2.6.9,really elegant,but
> stillsomething confuse me :
> 1 :why the starting location for pcie capability base is 0?
> what is the absolute offset for the capability register?
> --------------------------pcie_cap_base = 0; in pciehp_hpc.c

pcie_cap_base looks like a vestige of some earlier code and should
simply be removed, along with saved_cap_base.

> 2:what is the mechanism for read/write config space
> #define hp_register_read_word(pdev, reg , value)                \
>       pci_read_config_word(pdev, reg, &value)
> going down ,i get the  pci_bus_read_config_word,so ,where is the real guts?
> thank u!

drivers/pci/access.c  They're constructed, which is why you can't grep for
them.  Of course, the low-level accessors are defined per-architecture,
sometimes in several different ways, depending on what bus is being
accessed.


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Re: [Pcihpd-discuss] Fwd: what is the pcie capability base for a configure process

[william wallace]

thank u sir! u help my thought out :)
i have read lots of document ,but i just can not locate the absolute
REG address for the pci express capability reg?
i just want to port this to freebsd ,but found that freebsd donot go
out of the 256 configuration space :(

still some question:
On 5/29/06, Matthew Wilcox <matthew@wil.cx> wrote:
> On Mon, May 29, 2006 at 11:30:07AM +0800, william wallace wrote:
> >      I am  reading ur code for pcie configuration registers and
> > configuration process for linux kenerl 2.6.9,really elegant,but
> > stillsomething confuse me :
> > 1 :why the starting location for pcie capability base is 0?
> > what is the absolute offset for the capability register?
> > --------------------------pcie_cap_base = 0; in pciehp_hpc.c
>
> pcie_cap_base looks like a vestige of some earlier code and should
> simply be removed, along with saved_cap_base.

but ,still in linux kenerl 2.6.16 ,they r there
Pciehp_hpc.c (linux-2.6.16.16\drivers\pci\hotplug):	int cap_base,
saved_cap_base;
Pciehp_hpc.c (linux-2.6.16.16\drivers\pci\hotplug):	saved_cap_base pcie_cap_base;
Pciehp_hpc.c (linux-2.6.16.16\drivers\pci\hotplug):	pcie_cap_base saved_cap_base;
Pciehp_hpc.c (linux-2.6.16.16\drivers\pci\hotplug):static int
pcie_cap_base = 0;		/* Base of the PCI Express capability item
structure */
Pciehp_hpc.c (linux-2.6.16.16\drivers\pci\hotplug):	saved_cap_base pcie_cap_base;
Pciehp_hpc.c (linux-2.6.16.16\drivers\pci\hotplug):	dbg("%s:
pcie_cap_base %x\n", __FUNCTION__, pcie_cap_base);
Pciehp_hpc.c (linux-2.6.16.16\drivers\pci\hotplug):	pcie_cap_base saved_cap_base;
>
> > 2:what is the mechanism for read/write config space
> > #define hp_register_read_word(pdev, reg , value)                \
> >       pci_read_config_word(pdev, reg, &value)
> > going down ,i get the  pci_bus_read_config_word,so ,where is the real guts?
> > thank u!
>
> drivers/pci/access.c  They're constructed, which is why you can't grep for
> them.  Of course, the low-level accessors are defined per-architecture,
> sometimes in several different ways, depending on what bus is being
> accessed.
>


-- 
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Re: [Pcihpd-discuss] Fwd: what is the pcie capability base for a configure process

[william wallace]

is that the  capability base in pci_regs.h?
/* Capability lists */
#define  PCI_CAP_ID_SHPC 	0x0C	/* PCI Standard Hot-Plug Controller */
#define  PCI_CAP_ID_EXP 	0x10	/* PCI Express */


On 5/29/06, william wallace <avalonwallace@gmail.com> wrote:
> thank u sir! u help my thought out :)
> i have read lots of document ,but i just can not locate the absolute
> REG address for the pci express capability reg?
> i just want to port this to freebsd ,but found that freebsd donot go
> out of the 256 configuration space :(
>
> still some question:
> On 5/29/06, Matthew Wilcox <matthew@wil.cx> wrote:
> > On Mon, May 29, 2006 at 11:30:07AM +0800, william wallace wrote:
> > >      I am  reading ur code for pcie configuration registers and
> > > configuration process for linux kenerl 2.6.9,really elegant,but
> > > stillsomething confuse me :
> > > 1 :why the starting location for pcie capability base is 0?
> > > what is the absolute offset for the capability register?
> > > --------------------------pcie_cap_base = 0; in pciehp_hpc.c
> >
> > pcie_cap_base looks like a vestige of some earlier code and should
> > simply be removed, along with saved_cap_base.
>
> but ,still in linux kenerl 2.6.16 ,they r there
> Pciehp_hpc.c (linux-2.6.16.16\drivers\pci\hotplug):     int cap_base,
> saved_cap_base;
> Pciehp_hpc.c (linux-2.6.16.16\drivers\pci\hotplug):     saved_cap_base > pcie_cap_base;
> Pciehp_hpc.c (linux-2.6.16.16\drivers\pci\hotplug):     pcie_cap_base > saved_cap_base;
> Pciehp_hpc.c (linux-2.6.16.16\drivers\pci\hotplug):static int
> pcie_cap_base = 0;              /* Base of the PCI Express capability item
> structure */
> Pciehp_hpc.c (linux-2.6.16.16\drivers\pci\hotplug):     saved_cap_base > pcie_cap_base;
> Pciehp_hpc.c (linux-2.6.16.16\drivers\pci\hotplug):     dbg("%s:
> pcie_cap_base %x\n", __FUNCTION__, pcie_cap_base);
> Pciehp_hpc.c (linux-2.6.16.16\drivers\pci\hotplug):     pcie_cap_base > saved_cap_base;
> >
> > > 2:what is the mechanism for read/write config space
> > > #define hp_register_read_word(pdev, reg , value)                \
> > >       pci_read_config_word(pdev, reg, &value)
> > > going down ,i get the  pci_bus_read_config_word,so ,where is the real guts?
> > > thank u!
> >
> > drivers/pci/access.c  They're constructed, which is why you can't grep for
> > them.  Of course, the low-level accessors are defined per-architecture,
> > sometimes in several different ways, depending on what bus is being
> > accessed.
> >
>
>
> --
> we who r about to die,salute u!
>


-- 
we who r about to die,salute u!


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