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AJvYcCURQMnTjQTKGxGuAsCjK1MzO0M2sjmf+iJG7a43xbnjazGMg2XnPSewtnNcrD61O8+zOZQp2HaFMm9DTw==@vger.kernel.org X-Gm-Message-State: AOJu0YwlIk2sUg/CstIjhLFbhryWHmWAmFmh5upsbgsealj1mgve9zpB VEKtU46LgnX02UXSSogHqAu7Y0RrAcmfcj3qqRkPScROxdK3fVzCens6zK9DAB0= X-Google-Smtp-Source: AGHT+IH5YojtTCXPyJJ4lTGTYwMyqJoiDT2Gfsd5O7M+EFfJaBPt+qjG+4n23Bhz9LKYCstgj2LvHQ== X-Received: by 2002:a05:6000:1f8a:b0:37d:3f42:9b59 with SMTP id ffacd0b85a97d-381f1865395mr1669883f8f.11.1731055972660; Fri, 08 Nov 2024 00:52:52 -0800 (PST) Received: from localhost ([2a01:e0a:3c5:5fb1:ecfd:9f8d:62a3:6ba8]) by smtp.gmail.com with ESMTPSA id ffacd0b85a97d-381eda05f89sm3921215f8f.98.2024.11.08.00.52.51 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Fri, 08 Nov 2024 00:52:52 -0800 (PST) From: Jerome Brunet To: Guenter Roeck Cc: Jean Delvare , Jonathan Corbet , Patrick Rudolph , Naresh Solanki , Rob Herring , Krzysztof Kozlowski , Conor Dooley , Delphine CC Chiu , linux-hwmon@vger.kernel.org, linux-kernel@vger.kernel.org, linux-doc@vger.kernel.org, devicetree@vger.kernel.org, linux-i2c@vger.kernel.org, Conor Dooley , Vaishnav Achath Subject: Re: [PATCH v4 0/7] hwmon: pmbus: add tps25990 efuse support In-Reply-To: (Guenter Roeck's message of "Wed, 6 Nov 2024 08:12:04 -0800") References: <20241105-tps25990-v4-0-0e312ac70b62@baylibre.com> Date: Fri, 08 Nov 2024 09:52:51 +0100 Message-ID: <1jldxu2jks.fsf@starbuckisacylon.baylibre.com> Precedence: bulk X-Mailing-List: linux-hwmon@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Type: text/plain On Wed 06 Nov 2024 at 08:12, Guenter Roeck wrote: > On 11/5/24 09:58, Jerome Brunet wrote: >> This patchset adds initial support for the Texas Instruments TPS25990 >> eFuse. The TPS25990 is an integrated, high-current circuit protection and >> power management device. TPS25895 may be stacked on the TPS25990 for >> higher currents. >> This patchset provides basic telemetry support for the device. >> On boot, the device is write protected. Limits can be changed in sysfs >> if the write protection is removed using the introduced pmbus parameter. >> Limits will be restored to the default value device on startup, unless >> saved to NVM. Writing the NVM is not supported by the driver at the moment. >> As part of this series, PMBus regulator support is improved to better >> support write-protected devices. >> Patch 3 depends on the regulator patchset available here [1]. >> This is a compilation dependency. >> > > Unfortunately this means that I can not apply this and the following patch > until after the next commit window, which is unfortunate since patch 4 > does not logically depend on patch 3. That also means that I can not apply > the last patch of the series since it depends on the ability to disable > write protect. Those patches will have to wait until after the next commit > window. These 2 patches where always gonna be touching the same part of the code. Indeed 4 could have come before, I did not really think about it TBH. No problem waiting for -rc1. I'll rebase the remaining changes when it's out and add the necessary change on patch 7. Thanks for your support > > Guenter -- Jerome