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AJvYcCUVk8lufuyLHUoZ5yIHURuiQnHnSm73s7SkFfuRh1VILEXHQ6Xfcck9VRUFNT0yefwytcqOvBhfaTnkoA==@vger.kernel.org X-Gm-Message-State: AOJu0YzJlg4TRNGeQCkyqVnuxRA2dlfhugG1YjOu809rsCcRogqzCqTa 9dUy1Tl2TkK2myAag52dbrnhBTfkYzN17qx7zZe4uUJm4AvW3sux2nrpSa6XBMs= X-Google-Smtp-Source: AGHT+IEGxCmPOWLzM0bzj/TXKrnSrKDuB1/okZ3cbyLHE4zCDXwSir+KcCmZbuM3Pt/+K5DFnkIxNg== X-Received: by 2002:a05:6000:2aa:b0:37e:f1ed:67e8 with SMTP id ffacd0b85a97d-381f186dd5cmr1454470f8f.35.1731055658002; Fri, 08 Nov 2024 00:47:38 -0800 (PST) Received: from localhost ([2a01:e0a:3c5:5fb1:ecfd:9f8d:62a3:6ba8]) by smtp.gmail.com with ESMTPSA id ffacd0b85a97d-381ed970e23sm3930442f8f.18.2024.11.08.00.47.37 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Fri, 08 Nov 2024 00:47:37 -0800 (PST) From: Jerome Brunet To: Guenter Roeck Cc: Jean Delvare , Jonathan Corbet , Patrick Rudolph , Naresh Solanki , Rob Herring , Krzysztof Kozlowski , Conor Dooley , Delphine CC Chiu , linux-hwmon@vger.kernel.org, linux-kernel@vger.kernel.org, linux-doc@vger.kernel.org, devicetree@vger.kernel.org, linux-i2c@vger.kernel.org, Vaishnav Achath Subject: Re: [PATCH v4 7/7] hwmon: (pmbus/tps25990): add initial support In-Reply-To: (Guenter Roeck's message of "Wed, 6 Nov 2024 10:59:11 -0800") References: <20241105-tps25990-v4-0-0e312ac70b62@baylibre.com> <20241105-tps25990-v4-7-0e312ac70b62@baylibre.com> Date: Fri, 08 Nov 2024 09:47:36 +0100 Message-ID: <1jpln62jtj.fsf@starbuckisacylon.baylibre.com> Precedence: bulk X-Mailing-List: linux-hwmon@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Type: text/plain On Wed 06 Nov 2024 at 10:59, Guenter Roeck wrote: >> + >> +static int tps25990_mfr_write_protect_set(struct i2c_client *client, >> + u8 protect) >> +{ >> + /* >> + * The chip has a single protection mode, set it regardless of >> + * the specific protection requested >> + */ >> + return pmbus_write_byte_data(client, -1, TPS25990_MFR_WRITE_PROTECT, >> + protect ? 0x0 : 0xa2); > > After some thought, I think it would be better to reject all protect values > other than 0 (no write protection) and PB_WP_ALL because that is what the chip > supports. Something like Since operation would not be allowed, it's maps the closest indeed. > > if (protect & ~PB_WP_ALL) > return -ENXIO; // or -EINVAL ? Not really sure. The command is supported but the argument would not be, so -EINVAL seems appropriate to me. > > Thanks, > Guenter -- Jerome