[PATCH 05/11] ARM: socfpga: dts: Add SPI Master1 for Arria10 System Resource chip

tthayer
2016-04-22T15:33:33Z

From: Thor Thayer <tthayer@opensource.altera.com>

Add the Altera Arria10 SPI Master Node in preparation for the A10SR
MFD node.

Signed-off-by: Thor Thayer <tthayer@opensource.altera.com>
---
arch/arm/boot/dts/socfpga_arria10.dtsi | 15 +++++++++++++++
1 file changed, 15 insertions(+)

diff --git a/arch/arm/boot/dts/socfpga_arria10.dtsi b/arch/arm/boot/dts/socfpga_arria10.dtsi
index 17e81dc..e7b6c4a 100644
--- a/arch/arm/boot/dts/socfpga_arria10.dtsi
+++ b/arch/arm/boot/dts/socfpga_arria10.dtsi
@@ -567,6 +567,21 @@
status = "disabled";
};

+ spi1: spi@ffda5000 {
+ compatible = "snps,dw-apb-ssi";
+ #address-cells = <1>;
+ #size-cells = <0>;
+ reg = <0xffda5000 0x100>;
+ interrupts = <0 102 4>;
+ num-chipselect = <4>;
+ bus-num = <0>;
+ /*32bit_access;*/
+ tx-dma-channel = <&pdma 16>;
+ rx-dma-channel = <&pdma 17>;
+ clocks = <&spi_m_clk>;
+ status = "disabled";
+ };
+
sdr: sdr@ffc25000 {
compatible = "syscon";
reg = <0xffcfb100 0x80>;
--
1.7.9.5