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charset=iso-8859-1 Content-Disposition: inline Content-Transfer-Encoding: 8bit In-Reply-To: <3b1750d0-bb1c-0a37-e1a0-d7c25b4bc525@sedsystems.ca> User-Agent: Mutt/1.9.4 (2018-02-28) Sender: linux-hwmon-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-hwmon@vger.kernel.org On Mon, Mar 30, 2020 at 01:09:56PM -0600, Robert Hancock wrote: > On 2020-03-30 12:48 p.m., Guenter Roeck wrote: > > On 3/30/20 8:42 AM, Robert Hancock wrote: > > > On 2020-03-30 9:24 a.m., Guenter Roeck wrote: > > > > On 3/30/20 4:33 AM, Michal Simek wrote: > > > > > Hi Robert and Guenter, > > > > > > > > > > Xilinx boards are using IRPS5401 chips and I have tried to use your driver. > > > > > I have checked that u-boot can detect that devices and read it. > > > > > > > > > > ZynqMP> i2c probe > > > > > Valid chip addresses: 0C 13 14 20 43 44 74 > > > > > ZynqMP> i2c md 13 0 10 > > > > > 0000: 00 08 00 08 00 08 00 08 00 08 00 08 00 08 00 08    ................ > > > > > ZynqMP> i2c md 14 0 10 > > > > > 0000: 00 08 00 08 00 08 00 08 00 08 00 08 00 08 00 08    ................ > > > > > ZynqMP> i2c md 43 0 10 > > > > > 0000: 00 98 ff ff ff ff ff ff ff ff ff ff ff ff ff ff    ................ > > > > > ZynqMP> i2c md 44 0 10 > > > > > 0000: 00 8a ff ff ff ff ff ff ff ff ff ff ff ff ff ff    ................ > > > > > ZynqMP> > > > > > > > > > > Here is DT fragment which I use (it is under i2c mux) > > > > > > > > > > 185                         irps5401_43: irps5401@43 { > > > > > 186                                 compatible = "infineon,irps5401"; > > > > > 187                                 reg = <0x43>; /* pmbus / i2c 0x13 */ > > > > > > > > Does that mean the mux is at 0x13 ? > > > > > > These chips have two I2C addresses with two separate interfaces: the standard PMBus-compatible interface at an address between 0x40-0x4f, which the irps5401 driver supports, and another proprietary interface at an address between 0x10-0x1f. The specific addresses in those ranges is configured by the value of a resistor on one of the pins. > > > > > > > Ah, sorry, I didn't get that part earlier. Unfortunately, the datasheet > > doesn't seem to include a description of the proprietary interface > > registers/commands, or maybe I am missing it. > > > > The chip datasheet does talk a lot about various MTP registers. > > Part of that register set is Write_protect_section and > > Read_protect_section. Maybe the PMBus registers are all read > > protected ? > > There is a programming guide and register map on the Infineon site under > "Additional Technical Information" here: > > https://www.infineon.com/cms/en/product/power/dc-dc-converters/integrated-pol-voltage-regulators/irps5401m/ > Based on that my best guess would be that either the chips are not at the expected addresses, or that the registers are indeed read protected. Guenter