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From: Thomas Gleixner <tglx@linutronix.de>
To: LKML <linux-kernel@vger.kernel.org>
Cc: x86@kernel.org, Tom Lendacky <thomas.lendacky@amd.com>,
	Andrew Cooper <andrew.cooper3@citrix.com>,
	Arjan van de Ven <arjan@linux.intel.com>,
	"James E.J. Bottomley" <jejb@linux.ibm.com>,
	Dick Kennedy <dick.kennedy@broadcom.com>,
	James Smart <james.smart@broadcom.com>,
	"Martin K. Petersen" <martin.petersen@oracle.com>,
	linux-scsi@vger.kernel.org, Guenter Roeck <linux@roeck-us.net>,
	linux-hwmon@vger.kernel.org, Jean Delvare <jdelvare@suse.com>,
	Huang Rui <ray.huang@amd.com>, Juergen Gross <jgross@suse.com>,
	Steve Wahl <steve.wahl@hpe.com>,
	Mike Travis <mike.travis@hpe.com>,
	Dimitri Sivanich <dimitri.sivanich@hpe.com>,
	Russ Anderson <russ.anderson@hpe.com>
Subject: [patch v2 03/38] x86/cpu: Move cpu_die_id into topology info
Date: Fri, 28 Jul 2023 14:12:46 +0200 (CEST)	[thread overview]
Message-ID: <20230728120929.833540176@linutronix.de> (raw)
In-Reply-To: 20230728105650.565799744@linutronix.de

Move the next member.

No functional change.

Signed-off-by: Thomas Gleixner <tglx@linutronix.de>
---
 Documentation/arch/x86/topology.rst |    4 ++--
 arch/x86/include/asm/processor.h    |    4 +++-
 arch/x86/include/asm/topology.h     |    2 +-
 arch/x86/kernel/cpu/amd.c           |    8 ++++----
 arch/x86/kernel/cpu/cacheinfo.c     |    2 +-
 arch/x86/kernel/cpu/common.c        |    2 +-
 arch/x86/kernel/cpu/hygon.c         |    8 ++++----
 arch/x86/kernel/cpu/topology.c      |    2 +-
 arch/x86/kernel/smpboot.c           |   10 +++++-----
 9 files changed, 22 insertions(+), 20 deletions(-)

--- a/Documentation/arch/x86/topology.rst
+++ b/Documentation/arch/x86/topology.rst
@@ -55,7 +55,7 @@ AMD nomenclature for package is 'Node'.
 
     The number of dies in a package. This information is retrieved via CPUID.
 
-  - cpuinfo_x86.cpu_die_id:
+  - cpuinfo_x86.topo_die_id:
 
     The physical ID of the die. This information is retrieved via CPUID.
 
@@ -65,7 +65,7 @@ AMD nomenclature for package is 'Node'.
     and deduced from the APIC IDs of the cores in the package.
 
     Modern systems use this value for the socket. There may be multiple
-    packages within a socket. This value may differ from cpu_die_id.
+    packages within a socket. This value may differ from topo.die_id.
 
   - cpuinfo_x86.logical_proc_id:
 
--- a/arch/x86/include/asm/processor.h
+++ b/arch/x86/include/asm/processor.h
@@ -85,6 +85,9 @@ struct cpuinfo_topology {
 
 	// Physical package ID
 	u32			pkg_id;
+
+	// Physical die ID on AMD, Relative on Intel
+	u32			die_id;
 };
 
 struct cpuinfo_x86 {
@@ -140,7 +143,6 @@ struct cpuinfo_x86 {
 	u16			logical_proc_id;
 	/* Core id: */
 	u16			cpu_core_id;
-	u16			cpu_die_id;
 	u16			logical_die_id;
 	/* Index into per_cpu list: */
 	u16			cpu_index;
--- a/arch/x86/include/asm/topology.h
+++ b/arch/x86/include/asm/topology.h
@@ -108,7 +108,7 @@ extern const struct cpumask *cpu_cluster
 #define topology_logical_package_id(cpu)	(cpu_data(cpu).logical_proc_id)
 #define topology_physical_package_id(cpu)	(cpu_data(cpu).topo.pkg_id)
 #define topology_logical_die_id(cpu)		(cpu_data(cpu).logical_die_id)
-#define topology_die_id(cpu)			(cpu_data(cpu).cpu_die_id)
+#define topology_die_id(cpu)			(cpu_data(cpu).topo.die_id)
 #define topology_core_id(cpu)			(cpu_data(cpu).cpu_core_id)
 #define topology_ppin(cpu)			(cpu_data(cpu).ppin)
 
--- a/arch/x86/kernel/cpu/amd.c
+++ b/arch/x86/kernel/cpu/amd.c
@@ -338,7 +338,7 @@ static void amd_get_topology(struct cpui
 
 		cpuid(0x8000001e, &eax, &ebx, &ecx, &edx);
 
-		c->cpu_die_id  = ecx & 0xff;
+		c->topo.die_id  = ecx & 0xff;
 
 		if (c->x86 == 0x15)
 			c->cu_id = ebx & 0xff;
@@ -364,9 +364,9 @@ static void amd_get_topology(struct cpui
 		u64 value;
 
 		rdmsrl(MSR_FAM10H_NODE_ID, value);
-		c->cpu_die_id = value & 7;
+		c->topo.die_id = value & 7;
 
-		per_cpu(cpu_llc_id, cpu) = c->cpu_die_id;
+		per_cpu(cpu_llc_id, cpu) = c->topo.die_id;
 	} else
 		return;
 
@@ -391,7 +391,7 @@ static void amd_detect_cmp(struct cpuinf
 	/* Convert the initial APIC ID into the socket ID */
 	c->topo.pkg_id = c->topo.initial_apicid >> bits;
 	/* use socket ID also for last level cache */
-	per_cpu(cpu_llc_id, cpu) = c->cpu_die_id = c->topo.pkg_id;
+	per_cpu(cpu_llc_id, cpu) = c->topo.die_id = c->topo.pkg_id;
 }
 
 u32 amd_get_nodes_per_socket(void)
--- a/arch/x86/kernel/cpu/cacheinfo.c
+++ b/arch/x86/kernel/cpu/cacheinfo.c
@@ -672,7 +672,7 @@ void cacheinfo_amd_init_llc_id(struct cp
 
 	if (c->x86 < 0x17) {
 		/* LLC is at the node level. */
-		per_cpu(cpu_llc_id, cpu) = c->cpu_die_id;
+		per_cpu(cpu_llc_id, cpu) = c->topo.die_id;
 	} else if (c->x86 == 0x17 && c->x86_model <= 0x1F) {
 		/*
 		 * LLC is at the core complex level.
--- a/arch/x86/kernel/cpu/common.c
+++ b/arch/x86/kernel/cpu/common.c
@@ -1768,7 +1768,7 @@ static void validate_apic_and_package_id
 		       cpu, apicid, c->topo.initial_apicid);
 	}
 	BUG_ON(topology_update_package_map(c->topo.pkg_id, cpu));
-	BUG_ON(topology_update_die_map(c->cpu_die_id, cpu));
+	BUG_ON(topology_update_die_map(c->topo.die_id, cpu));
 #else
 	c->logical_proc_id = 0;
 #endif
--- a/arch/x86/kernel/cpu/hygon.c
+++ b/arch/x86/kernel/cpu/hygon.c
@@ -72,7 +72,7 @@ static void hygon_get_topology(struct cp
 
 		cpuid(0x8000001e, &eax, &ebx, &ecx, &edx);
 
-		c->cpu_die_id  = ecx & 0xff;
+		c->topo.die_id  = ecx & 0xff;
 
 		c->cpu_core_id = ebx & 0xff;
 
@@ -95,9 +95,9 @@ static void hygon_get_topology(struct cp
 		u64 value;
 
 		rdmsrl(MSR_FAM10H_NODE_ID, value);
-		c->cpu_die_id = value & 7;
+		c->topo.die_id = value & 7;
 
-		per_cpu(cpu_llc_id, cpu) = c->cpu_die_id;
+		per_cpu(cpu_llc_id, cpu) = c->topo.die_id;
 	} else
 		return;
 
@@ -120,7 +120,7 @@ static void hygon_detect_cmp(struct cpui
 	/* Convert the initial APIC ID into the socket ID */
 	c->topo.pkg_id = c->topo.initial_apicid >> bits;
 	/* use socket ID also for last level cache */
-	per_cpu(cpu_llc_id, cpu) = c->cpu_die_id = c->topo.pkg_id;
+	per_cpu(cpu_llc_id, cpu) = c->topo.die_id = c->topo.pkg_id;
 }
 
 static void srat_detect_node(struct cpuinfo_x86 *c)
--- a/arch/x86/kernel/cpu/topology.c
+++ b/arch/x86/kernel/cpu/topology.c
@@ -150,7 +150,7 @@ int detect_extended_topology(struct cpui
 				ht_mask_width) & core_select_mask;
 
 	if (die_level_present) {
-		c->cpu_die_id = apic->phys_pkg_id(c->topo.initial_apicid,
+		c->topo.die_id = apic->phys_pkg_id(c->topo.initial_apicid,
 					core_plus_mask_width) & die_select_mask;
 	}
 
--- a/arch/x86/kernel/smpboot.c
+++ b/arch/x86/kernel/smpboot.c
@@ -368,7 +368,7 @@ static int topology_phys_to_logical_die(
 	for_each_possible_cpu(cpu) {
 		struct cpuinfo_x86 *c = &cpu_data(cpu);
 
-		if (c->initialized && c->cpu_die_id == die_id &&
+		if (c->initialized && c->topo.die_id == die_id &&
 		    c->topo.pkg_id == proc_id)
 			return c->logical_die_id;
 	}
@@ -430,7 +430,7 @@ void __init smp_store_boot_cpu_info(void
 	*c = boot_cpu_data;
 	c->cpu_index = id;
 	topology_update_package_map(c->topo.pkg_id, id);
-	topology_update_die_map(c->cpu_die_id, id);
+	topology_update_die_map(c->topo.die_id, id);
 	c->initialized = true;
 }
 
@@ -485,7 +485,7 @@ static bool match_smt(struct cpuinfo_x86
 		int cpu1 = c->cpu_index, cpu2 = o->cpu_index;
 
 		if (c->topo.pkg_id == o->topo.pkg_id &&
-		    c->cpu_die_id == o->cpu_die_id &&
+		    c->topo.die_id == o->topo.die_id &&
 		    per_cpu(cpu_llc_id, cpu1) == per_cpu(cpu_llc_id, cpu2)) {
 			if (c->cpu_core_id == o->cpu_core_id)
 				return topology_sane(c, o, "smt");
@@ -497,7 +497,7 @@ static bool match_smt(struct cpuinfo_x86
 		}
 
 	} else if (c->topo.pkg_id == o->topo.pkg_id &&
-		   c->cpu_die_id == o->cpu_die_id &&
+		   c->topo.die_id == o->topo.die_id &&
 		   c->cpu_core_id == o->cpu_core_id) {
 		return topology_sane(c, o, "smt");
 	}
@@ -508,7 +508,7 @@ static bool match_smt(struct cpuinfo_x86
 static bool match_die(struct cpuinfo_x86 *c, struct cpuinfo_x86 *o)
 {
 	if (c->topo.pkg_id == o->topo.pkg_id &&
-	    c->cpu_die_id == o->cpu_die_id)
+	    c->topo.die_id == o->topo.die_id)
 		return true;
 	return false;
 }


  parent reply	other threads:[~2023-07-28 12:13 UTC|newest]

Thread overview: 72+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2023-07-28 12:12 [patch v2 00/38] x86/cpu: Rework the topology evaluation Thomas Gleixner
2023-07-28 12:12 ` [patch v2 01/38] x86/cpu: Encapsulate topology information in cpuinfo_x86 Thomas Gleixner
2023-07-28 12:12 ` [patch v2 02/38] x86/cpu: Move phys_proc_id into topology info Thomas Gleixner
2023-07-28 12:12 ` Thomas Gleixner [this message]
2023-07-28 12:12 ` [patch v2 04/38] scsi: lpfc: Use topology_core_id() Thomas Gleixner
2023-07-28 12:12 ` [patch v2 05/38] hwmon: (fam15h_power) " Thomas Gleixner
2023-07-28 12:12 ` [patch v2 06/38] x86/cpu: Move cpu_core_id into topology info Thomas Gleixner
2023-07-28 12:12 ` [patch v2 07/38] x86/cpu: Move cu_id " Thomas Gleixner
2023-07-28 12:12 ` [patch v2 08/38] x86/cpu: Remove pointless evaluation of x86_coreid_bits Thomas Gleixner
2023-07-28 12:12 ` [patch v2 09/38] x86/cpu: Move logical package and die IDs into topology info Thomas Gleixner
2023-07-28 12:12 ` [patch v2 10/38] x86/cpu: Move cpu_l[l2]c_id " Thomas Gleixner
2023-07-28 12:12 ` [patch v2 11/38] x86/apic: Use BAD_APICID consistently; Thomas Gleixner
2023-07-28 22:36   ` Sohil Mehta
2023-07-28 22:50     ` Thomas Gleixner
2023-07-28 12:12 ` [patch v2 12/38] x86/apic: Use u32 for APIC IDs in global data Thomas Gleixner
2023-07-28 12:12 ` [patch v2 13/38] x86/apic: Use u32 for check_apicid_used() Thomas Gleixner
2023-07-28 12:13 ` [patch v2 14/38] x86/apic: Use u32 for cpu_present_to_apicid() Thomas Gleixner
2023-07-28 12:13 ` [patch v2 15/38] x86/apic: Use u32 for phys_pkg_id() Thomas Gleixner
2023-08-08 20:14   ` Steve Wahl
2023-07-28 12:13 ` [patch v2 16/38] x86/apic: Use u32 for [gs]et_apic_id() Thomas Gleixner
2023-08-08 20:15   ` Steve Wahl
2023-07-28 12:13 ` [patch v2 17/38] x86/apic: Use u32 for wakeup_secondary_cpu[_64]() Thomas Gleixner
2023-08-08 20:15   ` Steve Wahl
2023-07-28 12:13 ` [patch v2 18/38] x86/cpu/topology: Cure the abuse of cpuinfo for persisting logical ids Thomas Gleixner
2023-07-28 12:13 ` [patch v2 19/38] x86/cpu: Provide debug interface Thomas Gleixner
2023-07-28 23:57   ` Sohil Mehta
2023-07-28 12:13 ` [patch v2 20/38] x86/cpu: Provide cpuid_read() et al Thomas Gleixner
2023-07-28 12:13 ` [patch v2 21/38] x86/cpu: Provide cpu_init/parse_topology() Thomas Gleixner
2023-07-29  0:02   ` Sohil Mehta
2023-07-31  4:05   ` Michael Kelley (LINUX)
2023-07-31 12:34     ` Thomas Gleixner
2023-07-31 13:27       ` Peter Zijlstra
2023-07-31 15:38         ` Thomas Gleixner
2023-07-31 16:10           ` Michael Kelley (LINUX)
2023-07-31 20:48             ` Thomas Gleixner
2023-07-31 21:27               ` Michael Kelley (LINUX)
2023-07-31 22:12                 ` Thomas Gleixner
2023-08-01 22:25                   ` Thomas Gleixner
2023-08-01 22:35                     ` Andrew Cooper
2023-08-02 14:43                     ` Michael Kelley (LINUX)
2023-07-31 16:25       ` Michael Kelley (LINUX)
2023-07-31 20:41         ` Thomas Gleixner
2023-07-31 13:47     ` Arjan van de Ven
2023-07-31 14:08       ` Andrew Cooper
2023-08-01  7:05   ` Gautham R. Shenoy
2023-08-01  7:34     ` Thomas Gleixner
2023-07-28 12:13 ` [patch v2 22/38] x86/cpu: Add legacy topology parser Thomas Gleixner
2023-07-28 21:33   ` [patch v2A " Thomas Gleixner
2023-07-28 12:13 ` [patch v2 23/38] x86/cpu: Use common topology code for Centaur and Zhaoxin Thomas Gleixner
2023-07-28 12:13 ` [patch v2 24/38] x86/cpu: Move __max_die_per_package to common.c Thomas Gleixner
2023-07-28 12:13 ` [patch v2 25/38] x86/cpu: Provide a sane leaf 0xb/0x1f parser Thomas Gleixner
2023-07-28 12:13 ` [patch v2 26/38] x86/cpu: Use common topology code for Intel Thomas Gleixner
2023-07-28 12:13 ` [patch v2 27/38] x86/cpu/amd: Provide a separate acessor for Node ID Thomas Gleixner
2023-07-29  0:07   ` Sohil Mehta
2023-07-28 12:13 ` [patch v2 28/38] x86/cpu: Provide an AMD/HYGON specific topology parser Thomas Gleixner
2023-07-29  0:05   ` Sohil Mehta
2023-07-30  5:20   ` Michael Kelley (LINUX)
2023-07-30  7:41     ` Thomas Gleixner
2023-07-28 12:13 ` [patch v2 29/38] x86/smpboot: Teach it about topo.amd_node_id Thomas Gleixner
2023-07-28 12:13 ` [patch v2 30/38] x86/cpu: Use common topology code for AMD Thomas Gleixner
2023-07-28 12:13 ` [patch v2 31/38] x86/cpu: Use common topology code for HYGON Thomas Gleixner
2023-07-28 12:13 ` [patch v2 32/38] x86/mm/numa: Use core domain size on AMD Thomas Gleixner
2023-07-28 12:13 ` [patch v2 33/38] x86/cpu: Make topology_amd_node_id() use the actual node info Thomas Gleixner
2023-07-28 12:13 ` [patch v2 34/38] x86/cpu: Remove topology.c Thomas Gleixner
2023-07-28 12:13 ` [patch v2 35/38] x86/cpu: Remove x86_coreid_bits Thomas Gleixner
2023-07-28 12:13 ` [patch v2 36/38] x86/apic: Remove unused phys_pkg_id() callback Thomas Gleixner
2023-08-08 20:15   ` Steve Wahl
2023-07-28 12:13 ` [patch v2 37/38] x86/xen/smp_pv: Remove cpudata fiddling Thomas Gleixner
2023-07-28 12:13 ` [patch v2 38/38] x86/apic/uv: Remove the private leaf 0xb parser Thomas Gleixner
2023-08-08 20:16   ` Steve Wahl
2023-07-28 15:41 ` [patch v2 00/38] x86/cpu: Rework the topology evaluation Dimitri Sivanich
2023-07-28 19:01 ` Sohil Mehta

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