[PATCH v3 0/2] hwmon: (pmbus/max31785) refactor inter-access delay handling

[PATCH v3 0/2] hwmon: (pmbus/max31785) refactor inter-access delay handling

[Sanman Pradhan]

This v3 series addresses the feedback regarding the timing handover
between driver-local pre-probe accesses and the PMBus core's timing
management.

By exporting the PMBus core timing helpers and integrating them into
the MAX31785 driver, we can eliminate over 100 lines of local wrapper 
boilerplate while ensuring that both standard and raw I2C transfers 
respect the device's 250us inter-access delay requirement.

Changes in v3:
- Dropped the u16 -> u8 wrapper type fix in max31785.c as it was 
  already applied upstream.
- Fixed a comment style nit in max31785_read_long_data().
- Added an explicit max31785_wait() before pmbus_do_probe() to ensure
  the 250us delay is respected during the handover from driver-local
  timing to PMBus core timing.

Changes in v2:
- Dropped the i2c_smbus_write_byte_data() wrapper cleanup (applied upstream).
- Patch 1 (New): Export pmbus_wait() and pmbus_update_ts() from the PMBus 
  core, and move PMBUS_OP_* macros to drivers/hwmon/pmbus/pmbus.h.
- Patch 2: Replaced the usleep_range() sandwich around the raw long-read 
  path with the newly exported core timing functions. Placed 
  pmbus_update_ts() before the error check to ensure the core accurately 
  tracks the bus transaction even on failure.

Sanman Pradhan (2):
  hwmon: (pmbus) export pmbus_wait and pmbus_update_ts
  hwmon: (pmbus/max31785) use access_delay for PMBus-mediated accesses

 drivers/hwmon/pmbus/max31785.c   | 182 ++++++++++---------------------
 drivers/hwmon/pmbus/pmbus.h      |   9 ++
 drivers/hwmon/pmbus/pmbus_core.c |  13 +--
 3 files changed, 68 insertions(+), 136 deletions(-)

-- 
2.34.1

[PATCH v3 1/2] hwmon: (pmbus) export pmbus_wait and pmbus_update_ts

[Sanman Pradhan]

Some PMBus devices require strict inter-transaction delays to avoid
NACKs or communication faults. The PMBus core manages this automatically
for standard PMBus accesses via pmbus_wait() and pmbus_update_ts().

However, when a device driver performs raw I2C/SMBus transfers (e.g.,
for long reads or custom commands) that bypass the PMBus core, the core's
timing state machine is unaware of the transaction. This can cause the
next core-mediated PMBus access to violate the device's required delay.

Export pmbus_wait() and pmbus_update_ts() to the PMBUS namespace so
device-specific drivers can explicitly synchronize their raw transfers
with the core's delay management.

Additionally, move the PMBUS_OP_WRITE and PMBUS_OP_PAGE_CHANGE bitmasks
into the drivers/hwmon/pmbus/pmbus.h header so callers can accurately
report the nature of their raw transactions.

Signed-off-by: Sanman Pradhan <psanman@juniper.net>
---
v3:
- No changes to this patch in this version.

v2:
- New patch in the series.
- Export pmbus_wait() and pmbus_update_ts() to the PMBUS namespace.
- Relocate PMBUS_OP_* bitmasks to the subsystem header.
---
 drivers/hwmon/pmbus/pmbus.h      |  9 +++++++++
 drivers/hwmon/pmbus/pmbus_core.c | 13 ++++---------
 2 files changed, 13 insertions(+), 9 deletions(-)

diff --git a/drivers/hwmon/pmbus/pmbus.h b/drivers/hwmon/pmbus/pmbus.h
index 3ddcb742d289..56620ed4ac9c 100644
--- a/drivers/hwmon/pmbus/pmbus.h
+++ b/drivers/hwmon/pmbus/pmbus.h
@@ -424,6 +424,13 @@ enum vrm_version { vr11 = 0, vr12, vr13, imvp9, amd625mv, nvidia195mv };
 #define PMBUS_REV_12 0x22	/* PMBus revision 1.2 */
 #define PMBUS_REV_13 0x33	/* PMBus revision 1.3 */
 
+/*
+ * The type of operation used for picking the delay between
+ * successive pmbus operations.
+ */
+#define PMBUS_OP_WRITE		BIT(0)
+#define PMBUS_OP_PAGE_CHANGE	BIT(1)
+
 struct pmbus_driver_info {
 	int pages;		/* Total number of pages */
 	u8 phases[PMBUS_PAGES];	/* Number of phases per page */
@@ -555,6 +562,8 @@ int pmbus_update_byte_data(struct i2c_client *client, int page, u8 reg,
 void pmbus_clear_faults(struct i2c_client *client);
 bool pmbus_check_byte_register(struct i2c_client *client, int page, int reg);
 bool pmbus_check_word_register(struct i2c_client *client, int page, int reg);
+void pmbus_wait(struct i2c_client *client);
+void pmbus_update_ts(struct i2c_client *client, int op);
 int pmbus_do_probe(struct i2c_client *client, struct pmbus_driver_info *info);
 const struct pmbus_driver_info *pmbus_get_driver_info(struct i2c_client
 						      *client);
diff --git a/drivers/hwmon/pmbus/pmbus_core.c b/drivers/hwmon/pmbus/pmbus_core.c
index 4d7634ee6148..b150c2ee670a 100644
--- a/drivers/hwmon/pmbus/pmbus_core.c
+++ b/drivers/hwmon/pmbus/pmbus_core.c
@@ -32,13 +32,6 @@
 #define PMBUS_ATTR_ALLOC_SIZE	32
 #define PMBUS_NAME_SIZE		24
 
-/*
- * The type of operation used for picking the delay between
- * successive pmbus operations.
- */
-#define PMBUS_OP_WRITE		BIT(0)
-#define PMBUS_OP_PAGE_CHANGE	BIT(1)
-
 static int wp = -1;
 module_param(wp, int, 0444);
 
@@ -173,7 +166,7 @@ void pmbus_set_update(struct i2c_client *client, u8 reg, bool update)
 EXPORT_SYMBOL_NS_GPL(pmbus_set_update, "PMBUS");
 
 /* Some chips need a delay between accesses. */
-static void pmbus_wait(struct i2c_client *client)
+void pmbus_wait(struct i2c_client *client)
 {
 	struct pmbus_data *data = i2c_get_clientdata(client);
 	s64 delay = ktime_us_delta(data->next_access_backoff, ktime_get());
@@ -181,9 +174,10 @@ static void pmbus_wait(struct i2c_client *client)
 	if (delay > 0)
 		fsleep(delay);
 }
+EXPORT_SYMBOL_NS_GPL(pmbus_wait, "PMBUS");
 
 /* Sets the last operation timestamp for pmbus_wait */
-static void pmbus_update_ts(struct i2c_client *client, int op)
+void pmbus_update_ts(struct i2c_client *client, int op)
 {
 	struct pmbus_data *data = i2c_get_clientdata(client);
 	const struct pmbus_driver_info *info = data->info;
@@ -197,6 +191,7 @@ static void pmbus_update_ts(struct i2c_client *client, int op)
 	if (delay > 0)
 		data->next_access_backoff = ktime_add_us(ktime_get(), delay);
 }
+EXPORT_SYMBOL_NS_GPL(pmbus_update_ts, "PMBUS");
 
 int pmbus_set_page(struct i2c_client *client, int page, int phase)
 {
-- 
2.34.1

Re: [PATCH v3 1/2] hwmon: (pmbus) export pmbus_wait and pmbus_update_ts

[Guenter Roeck]

On Wed, Mar 18, 2026 at 12:06:42PM -0700, Sanman Pradhan wrote:
> Some PMBus devices require strict inter-transaction delays to avoid
> NACKs or communication faults. The PMBus core manages this automatically
> for standard PMBus accesses via pmbus_wait() and pmbus_update_ts().
> 
> However, when a device driver performs raw I2C/SMBus transfers (e.g.,
> for long reads or custom commands) that bypass the PMBus core, the core's
> timing state machine is unaware of the transaction. This can cause the
> next core-mediated PMBus access to violate the device's required delay.
> 
> Export pmbus_wait() and pmbus_update_ts() to the PMBUS namespace so
> device-specific drivers can explicitly synchronize their raw transfers
> with the core's delay management.
> 
> Additionally, move the PMBUS_OP_WRITE and PMBUS_OP_PAGE_CHANGE bitmasks
> into the drivers/hwmon/pmbus/pmbus.h header so callers can accurately
> report the nature of their raw transactions.
> 
> Signed-off-by: Sanman Pradhan <psanman@juniper.net>

I get:

WARNING: From:/Signed-off-by: email address mismatch: 'From: Sanman Pradhan <sanman.p211993@gmail.com>' != 'Signed-off-by: Sanman Pradhan <psanman@juniper.net>'

when trying to apply this patch. Please resend both patches
with matching addresses.

Please have a look at the AI review results at
https://sashiko.dev/#/patchset/20260318190643.54372-1-psanman%40juniper.net

This is unrelated to this patch, but we'll have to find a solution
for the torn reads on 32-bit platforms (I never thought about that
possibility).

Thanks,
Guenter

> ---
> v3:
> - No changes to this patch in this version.
> 
> v2:
> - New patch in the series.
> - Export pmbus_wait() and pmbus_update_ts() to the PMBUS namespace.
> - Relocate PMBUS_OP_* bitmasks to the subsystem header.
> ---
>  drivers/hwmon/pmbus/pmbus.h      |  9 +++++++++
>  drivers/hwmon/pmbus/pmbus_core.c | 13 ++++---------
>  2 files changed, 13 insertions(+), 9 deletions(-)
> 
> diff --git a/drivers/hwmon/pmbus/pmbus.h b/drivers/hwmon/pmbus/pmbus.h
> index 3ddcb742d289..56620ed4ac9c 100644
> --- a/drivers/hwmon/pmbus/pmbus.h
> +++ b/drivers/hwmon/pmbus/pmbus.h
> @@ -424,6 +424,13 @@ enum vrm_version { vr11 = 0, vr12, vr13, imvp9, amd625mv, nvidia195mv };
>  #define PMBUS_REV_12 0x22	/* PMBus revision 1.2 */
>  #define PMBUS_REV_13 0x33	/* PMBus revision 1.3 */
>  
> +/*
> + * The type of operation used for picking the delay between
> + * successive pmbus operations.
> + */
> +#define PMBUS_OP_WRITE		BIT(0)
> +#define PMBUS_OP_PAGE_CHANGE	BIT(1)
> +
>  struct pmbus_driver_info {
>  	int pages;		/* Total number of pages */
>  	u8 phases[PMBUS_PAGES];	/* Number of phases per page */
> @@ -555,6 +562,8 @@ int pmbus_update_byte_data(struct i2c_client *client, int page, u8 reg,
>  void pmbus_clear_faults(struct i2c_client *client);
>  bool pmbus_check_byte_register(struct i2c_client *client, int page, int reg);
>  bool pmbus_check_word_register(struct i2c_client *client, int page, int reg);
> +void pmbus_wait(struct i2c_client *client);
> +void pmbus_update_ts(struct i2c_client *client, int op);
>  int pmbus_do_probe(struct i2c_client *client, struct pmbus_driver_info *info);
>  const struct pmbus_driver_info *pmbus_get_driver_info(struct i2c_client
>  						      *client);
> diff --git a/drivers/hwmon/pmbus/pmbus_core.c b/drivers/hwmon/pmbus/pmbus_core.c
> index 4d7634ee6148..b150c2ee670a 100644
> --- a/drivers/hwmon/pmbus/pmbus_core.c
> +++ b/drivers/hwmon/pmbus/pmbus_core.c
> @@ -32,13 +32,6 @@
>  #define PMBUS_ATTR_ALLOC_SIZE	32
>  #define PMBUS_NAME_SIZE		24
>  
> -/*
> - * The type of operation used for picking the delay between
> - * successive pmbus operations.
> - */
> -#define PMBUS_OP_WRITE		BIT(0)
> -#define PMBUS_OP_PAGE_CHANGE	BIT(1)
> -
>  static int wp = -1;
>  module_param(wp, int, 0444);
>  
> @@ -173,7 +166,7 @@ void pmbus_set_update(struct i2c_client *client, u8 reg, bool update)
>  EXPORT_SYMBOL_NS_GPL(pmbus_set_update, "PMBUS");
>  
>  /* Some chips need a delay between accesses. */
> -static void pmbus_wait(struct i2c_client *client)
> +void pmbus_wait(struct i2c_client *client)
>  {
>  	struct pmbus_data *data = i2c_get_clientdata(client);
>  	s64 delay = ktime_us_delta(data->next_access_backoff, ktime_get());
> @@ -181,9 +174,10 @@ static void pmbus_wait(struct i2c_client *client)
>  	if (delay > 0)
>  		fsleep(delay);
>  }
> +EXPORT_SYMBOL_NS_GPL(pmbus_wait, "PMBUS");
>  
>  /* Sets the last operation timestamp for pmbus_wait */
> -static void pmbus_update_ts(struct i2c_client *client, int op)
> +void pmbus_update_ts(struct i2c_client *client, int op)
>  {
>  	struct pmbus_data *data = i2c_get_clientdata(client);
>  	const struct pmbus_driver_info *info = data->info;
> @@ -197,6 +191,7 @@ static void pmbus_update_ts(struct i2c_client *client, int op)
>  	if (delay > 0)
>  		data->next_access_backoff = ktime_add_us(ktime_get(), delay);
>  }
> +EXPORT_SYMBOL_NS_GPL(pmbus_update_ts, "PMBUS");
>  
>  int pmbus_set_page(struct i2c_client *client, int page, int phase)
>  {

[PATCH v3 2/2] hwmon: (pmbus/max31785) use access_delay for PMBus-mediated accesses

[Sanman Pradhan]

The MAX31785 fan controller occasionally NACKs master transactions if
accesses are too tightly spaced. To avoid this, the driver currently
enforces a 250us inter-access delay with a private timestamp and wrapper
functions around both raw SMBus accesses and PMBus helper paths.

Simplify the driver by using pmbus_driver_info.access_delay for normal
PMBus-mediated accesses instead, and remove the driver-local PMBus
read/write wrappers.

Keep local delay handling for raw SMBus accesses used before
pmbus_do_probe(). For the raw i2c_transfer() long-read path, which
bypasses PMBus core timing, use pmbus_wait() and pmbus_update_ts() so
the PMBus core also tracks the raw transfer timing. Update the PMBus
core timestamp before checking the transfer result so failed transfers
do not skip the required delay before the next PMBus access.

Also update max31785_read_byte_data() so PMBUS_FAN_CONFIG_12 accesses
are only remapped for virtual pages, allowing physical-page accesses to
fall back to the PMBus core. With that change, use pmbus_update_fan()
for fan configuration updates.

Finally, use the delayed raw read helper for MFR_REVISION during probe,
rename the local variable "virtual" to "vpage", drop the unused
to_max31785_data() macro, and add an explicit delay before
pmbus_do_probe() so the first PMBus core access is properly spaced from
the last pre-probe raw access.

Signed-off-by: Sanman Pradhan <psanman@juniper.net>
---
v3:
- Added an explicit max31785_wait() before pmbus_do_probe() to ensure
  proper timing spacing during the handover to the PMBus core.

v2:
- Replaced local usleep_range() with core pmbus_wait() and pmbus_update_ts()
  in the raw long-read path.
- Updated read_byte_data() to allow core fallback for physical pages.
---
 drivers/hwmon/pmbus/max31785.c | 182 ++++++++++-----------------------
 1 file changed, 55 insertions(+), 127 deletions(-)

diff --git a/drivers/hwmon/pmbus/max31785.c b/drivers/hwmon/pmbus/max31785.c
index 50073fe0c5e8..2a160eaed5ed 100644
--- a/drivers/hwmon/pmbus/max31785.c
+++ b/drivers/hwmon/pmbus/max31785.c
@@ -31,8 +31,6 @@ struct max31785_data {
 	struct pmbus_driver_info info;
 };
 
-#define to_max31785_data(x)  container_of(x, struct max31785_data, info)
-
 /*
  * MAX31785 Driver Workaround
  *
@@ -40,9 +38,8 @@ struct max31785_data {
  * These issues are not indicated by the device itself, except for occasional
  * NACK responses during master transactions. No error bits are set in STATUS_BYTE.
  *
- * To address this, we introduce a delay of 250us between consecutive accesses
- * to the fan controller. This delay helps mitigate communication problems by
- * allowing sufficient time between accesses.
+ * Keep minimal local delay handling for raw pre-probe SMBus accesses.
+ * Normal PMBus-mediated accesses use pmbus_driver_info.access_delay instead.
  */
 static inline void max31785_wait(const struct max31785_data *data)
 {
@@ -54,87 +51,38 @@ static inline void max31785_wait(const struct max31785_data *data)
 }
 
 static int max31785_i2c_write_byte_data(struct i2c_client *client,
-					struct max31785_data *driver_data,
-					int command, u8 data)
+					struct max31785_data *data,
+					int command, u8 value)
 {
 	int rc;
 
-	max31785_wait(driver_data);
-	rc = i2c_smbus_write_byte_data(client, command, data);
-	driver_data->access = ktime_get();
+	max31785_wait(data);
+	rc = i2c_smbus_write_byte_data(client, command, value);
+	data->access = ktime_get();
 	return rc;
 }
 
 static int max31785_i2c_read_word_data(struct i2c_client *client,
-				       struct max31785_data *driver_data,
+				       struct max31785_data *data,
 				       int command)
 {
 	int rc;
 
-	max31785_wait(driver_data);
+	max31785_wait(data);
 	rc = i2c_smbus_read_word_data(client, command);
-	driver_data->access = ktime_get();
-	return rc;
-}
-
-static int _max31785_read_byte_data(struct i2c_client *client,
-				    struct max31785_data *driver_data,
-				    int page, int command)
-{
-	int rc;
-
-	max31785_wait(driver_data);
-	rc = pmbus_read_byte_data(client, page, command);
-	driver_data->access = ktime_get();
-	return rc;
-}
-
-static int _max31785_write_byte_data(struct i2c_client *client,
-				     struct max31785_data *driver_data,
-				     int page, int command, u16 data)
-{
-	int rc;
-
-	max31785_wait(driver_data);
-	rc = pmbus_write_byte_data(client, page, command, data);
-	driver_data->access = ktime_get();
-	return rc;
-}
-
-static int _max31785_read_word_data(struct i2c_client *client,
-				    struct max31785_data *driver_data,
-				    int page, int phase, int command)
-{
-	int rc;
-
-	max31785_wait(driver_data);
-	rc = pmbus_read_word_data(client, page, phase, command);
-	driver_data->access = ktime_get();
-	return rc;
-}
-
-static int _max31785_write_word_data(struct i2c_client *client,
-				     struct max31785_data *driver_data,
-				     int page, int command, u16 data)
-{
-	int rc;
-
-	max31785_wait(driver_data);
-	rc = pmbus_write_word_data(client, page, command, data);
-	driver_data->access = ktime_get();
+	data->access = ktime_get();
 	return rc;
 }
 
 static int max31785_read_byte_data(struct i2c_client *client, int page, int reg)
 {
-	const struct pmbus_driver_info *info = pmbus_get_driver_info(client);
-	struct max31785_data *driver_data = to_max31785_data(info);
-
 	switch (reg) {
 	case PMBUS_VOUT_MODE:
 		return -ENOTSUPP;
 	case PMBUS_FAN_CONFIG_12:
-		return _max31785_read_byte_data(client, driver_data,
+		if (page < MAX31785_NR_PAGES)
+			return -ENODATA;
+		return pmbus_read_byte_data(client,
 						page - MAX31785_NR_PAGES,
 						reg);
 	}
@@ -178,7 +126,21 @@ static int max31785_read_long_data(struct i2c_client *client, int page,
 	if (rc < 0)
 		return rc;
 
+	/*
+	 * Ensure the raw transfer is properly spaced from the
+	 * preceding PMBus transaction.
+	 */
+	pmbus_wait(client);
+
 	rc = i2c_transfer(client->adapter, msg, ARRAY_SIZE(msg));
+
+	/*
+	 * Update PMBus core timing state for the raw transfer, even on error.
+	 * Pass 0 as the operation mask since this is a raw read, intentionally
+	 * neither PMBUS_OP_WRITE nor PMBUS_OP_PAGE_CHANGE.
+	 */
+	pmbus_update_ts(client, 0);
+
 	if (rc < 0)
 		return rc;
 
@@ -203,19 +165,16 @@ static int max31785_get_pwm(struct i2c_client *client, int page)
 	return rv;
 }
 
-static int max31785_get_pwm_mode(struct i2c_client *client,
-				 struct max31785_data *driver_data, int page)
+static int max31785_get_pwm_mode(struct i2c_client *client, int page)
 {
 	int config;
 	int command;
 
-	config = _max31785_read_byte_data(client, driver_data, page,
-					  PMBUS_FAN_CONFIG_12);
+	config = pmbus_read_byte_data(client, page, PMBUS_FAN_CONFIG_12);
 	if (config < 0)
 		return config;
 
-	command = _max31785_read_word_data(client, driver_data, page, 0xff,
-					   PMBUS_FAN_COMMAND_1);
+	command = pmbus_read_word_data(client, page, 0xff, PMBUS_FAN_COMMAND_1);
 	if (command < 0)
 		return command;
 
@@ -233,8 +192,6 @@ static int max31785_get_pwm_mode(struct i2c_client *client,
 static int max31785_read_word_data(struct i2c_client *client, int page,
 				   int phase, int reg)
 {
-	const struct pmbus_driver_info *info = pmbus_get_driver_info(client);
-	struct max31785_data *driver_data = to_max31785_data(info);
 	u32 val;
 	int rv;
 
@@ -263,7 +220,7 @@ static int max31785_read_word_data(struct i2c_client *client, int page,
 		rv = max31785_get_pwm(client, page);
 		break;
 	case PMBUS_VIRT_PWM_ENABLE_1:
-		rv = max31785_get_pwm_mode(client, driver_data, page);
+		rv = max31785_get_pwm_mode(client, page);
 		break;
 	default:
 		rv = -ENODATA;
@@ -294,36 +251,7 @@ static inline u32 max31785_scale_pwm(u32 sensor_val)
 	return (sensor_val * 100) / 255;
 }
 
-static int max31785_update_fan(struct i2c_client *client,
-			       struct max31785_data *driver_data, int page,
-			       u8 config, u8 mask, u16 command)
-{
-	int from, rv;
-	u8 to;
-
-	from = _max31785_read_byte_data(client, driver_data, page,
-					PMBUS_FAN_CONFIG_12);
-	if (from < 0)
-		return from;
-
-	to = (from & ~mask) | (config & mask);
-
-	if (to != from) {
-		rv = _max31785_write_byte_data(client, driver_data, page,
-					       PMBUS_FAN_CONFIG_12, to);
-		if (rv < 0)
-			return rv;
-	}
-
-	rv = _max31785_write_word_data(client, driver_data, page,
-				       PMBUS_FAN_COMMAND_1, command);
-
-	return rv;
-}
-
-static int max31785_pwm_enable(struct i2c_client *client,
-			       struct max31785_data *driver_data, int page,
-			       u16 word)
+static int max31785_pwm_enable(struct i2c_client *client, int page, u16 word)
 {
 	int config = 0;
 	int rate;
@@ -351,23 +279,20 @@ static int max31785_pwm_enable(struct i2c_client *client,
 		return -EINVAL;
 	}
 
-	return max31785_update_fan(client, driver_data, page, config,
+	return pmbus_update_fan(client, page, 0, config,
 				   PB_FAN_1_RPM, rate);
 }
 
 static int max31785_write_word_data(struct i2c_client *client, int page,
 				    int reg, u16 word)
 {
-	const struct pmbus_driver_info *info = pmbus_get_driver_info(client);
-	struct max31785_data *driver_data = to_max31785_data(info);
-
 	switch (reg) {
 	case PMBUS_VIRT_PWM_1:
-		return max31785_update_fan(client, driver_data, page, 0,
+		return pmbus_update_fan(client, page, 0, 0,
 					   PB_FAN_1_RPM,
 					   max31785_scale_pwm(word));
 	case PMBUS_VIRT_PWM_ENABLE_1:
-		return max31785_pwm_enable(client, driver_data, page, word);
+		return max31785_pwm_enable(client, page, word);
 	default:
 		break;
 	}
@@ -391,6 +316,7 @@ static const struct pmbus_driver_info max31785_info = {
 	.read_byte_data = max31785_read_byte_data,
 	.read_word_data = max31785_read_word_data,
 	.write_byte = max31785_write_byte,
+	.access_delay = MAX31785_WAIT_DELAY_US,
 
 	/* RPM */
 	.format[PSC_FAN] = direct,
@@ -438,29 +364,29 @@ static const struct pmbus_driver_info max31785_info = {
 };
 
 static int max31785_configure_dual_tach(struct i2c_client *client,
-					struct pmbus_driver_info *info)
+					struct max31785_data *data)
 {
+	struct pmbus_driver_info *info = &data->info;
 	int ret;
 	int i;
-	struct max31785_data *driver_data = to_max31785_data(info);
 
 	for (i = 0; i < MAX31785_NR_FAN_PAGES; i++) {
-		ret = max31785_i2c_write_byte_data(client, driver_data,
+		ret = max31785_i2c_write_byte_data(client, data,
 						   PMBUS_PAGE, i);
 		if (ret < 0)
 			return ret;
 
-		ret = max31785_i2c_read_word_data(client, driver_data,
+		ret = max31785_i2c_read_word_data(client, data,
 						  MFR_FAN_CONFIG);
 		if (ret < 0)
 			return ret;
 
 		if (ret & MFR_FAN_CONFIG_DUAL_TACH) {
-			int virtual = MAX31785_NR_PAGES + i;
+			int vpage = MAX31785_NR_PAGES + i;
 
-			info->pages = virtual + 1;
-			info->func[virtual] |= PMBUS_HAVE_FAN12;
-			info->func[virtual] |= PMBUS_PAGE_VIRTUAL;
+			info->pages = vpage + 1;
+			info->func[vpage] |= PMBUS_HAVE_FAN12;
+			info->func[vpage] |= PMBUS_PAGE_VIRTUAL;
 		}
 	}
 
@@ -471,7 +397,7 @@ static int max31785_probe(struct i2c_client *client)
 {
 	struct device *dev = &client->dev;
 	struct pmbus_driver_info *info;
-	struct max31785_data *driver_data;
+	struct max31785_data *data;
 	bool dual_tach = false;
 	int ret;
 
@@ -480,20 +406,20 @@ static int max31785_probe(struct i2c_client *client)
 				     I2C_FUNC_SMBUS_WORD_DATA))
 		return -ENODEV;
 
-	driver_data = devm_kzalloc(dev, sizeof(struct max31785_data), GFP_KERNEL);
-	if (!driver_data)
+	data = devm_kzalloc(dev, sizeof(*data), GFP_KERNEL);
+	if (!data)
 		return -ENOMEM;
 
-	info = &driver_data->info;
-	driver_data->access = ktime_get();
+	data->access = ktime_get();
+	info = &data->info;
 	*info = max31785_info;
 
-	ret = max31785_i2c_write_byte_data(client, driver_data,
-					   PMBUS_PAGE, 255);
+	ret = max31785_i2c_write_byte_data(client, data,
+					   PMBUS_PAGE, 0xff);
 	if (ret < 0)
 		return ret;
 
-	ret = i2c_smbus_read_word_data(client, MFR_REVISION);
+	ret = max31785_i2c_read_word_data(client, data, MFR_REVISION);
 	if (ret < 0)
 		return ret;
 
@@ -509,11 +435,13 @@ static int max31785_probe(struct i2c_client *client)
 	}
 
 	if (dual_tach) {
-		ret = max31785_configure_dual_tach(client, info);
+		ret = max31785_configure_dual_tach(client, data);
 		if (ret < 0)
 			return ret;
 	}
 
+	max31785_wait(data);
+
 	return pmbus_do_probe(client, info);
 }
 
-- 
2.34.1