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From: sashiko-bot@kernel.org
To: "Brian Chiang" <chiang.brian@inventec.com>
Cc: linux-hwmon@vger.kernel.org
Subject: Re: [PATCH v5 2/2] hwmon: (pmbus/q54sj108a2) Add support for q50sn12072 and q54sn120a1
Date: Wed, 22 Apr 2026 19:32:04 +0000	[thread overview]
Message-ID: <20260422193204.E9186C19425@smtp.kernel.org> (raw)
In-Reply-To: <20260422-add-support-for-q50sn12072-and-q54sn120a1-v5-2-b8fb87262868@inventec.com>

Sashiko AI review found 1 potential issue(s):
- [High] Unprotected multi-step I2C accesses in debugfs attributes violate hwmon locking rules and risk hardware state corruption.
--

Note: The format of this report has been altered to provide a free-form
summary of the findings without directly quoting the original patch code,
due to text recitation restrictions.

commit 2b69d94c9e5ce34bab27d73e893934ef3b3cab81
Author: Jack Cheng <cheng.jackhy@inventec.com>
Subject: hwmon: (pmbus/q54sj108a2) Add support for q50sn12072 and q54sn120a1

This commit adds support for the Delta Q50SN12072 and Q54SN120A1 power
modules to the existing q54sj108a2 PMBus driver.

While reviewing the debugfs attribute setup extended in this patch, a
potential locking issue in the underlying driver logic was noticed.

According to the hardware monitoring subsystem guidelines, drivers must
implement locking for attributes registered outside the core API, such as
debugfs, to serialize i2c accesses with standard sysfs operations.

Looking at the implementation of q54sj108a2_debugfs_write(), it performs
multi-step i2c transactions without acquiring hwmon_lock(). For example,
when executing operations to store default configurations, it disables write
protection, writes a flash key, and then sends the store command.

Because the subsystem core lock is not held, could concurrent telemetry
polling from standard hwmon sysfs files interleave i2c operations within
this sensitive sequence?

If these transactions are interleaved, is there a risk of breaking the flash
unlock sequence and corrupting the power supply's non-volatile memory or
internal state machine?

Although this patch did not introduce the original debugfs write function,
it conditionally enables these debugfs attributes for specific chips without
addressing the missing serialization. Would it be possible to add the
necessary locking to the debugfs read and write handlers?

-- 
Sashiko AI review · https://sashiko.dev/#/patchset/20260422-add-support-for-q50sn12072-and-q54sn120a1-v5-0-b8fb87262868@inventec.com?part=2

      reply	other threads:[~2026-04-22 19:32 UTC|newest]

Thread overview: 4+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2026-04-22 12:25 [PATCH v5 0/2] Add support for q50sn12072 and q54sn120a1 Brian Chiang
2026-04-22 12:25 ` [PATCH v5 1/2] dt-bindings: trivial: Add q50sn12072 and q54sn120a1 support Brian Chiang
2026-04-22 12:25 ` [PATCH v5 2/2] hwmon: (pmbus/q54sj108a2) Add support for q50sn12072 and q54sn120a1 Brian Chiang
2026-04-22 19:32   ` sashiko-bot [this message]

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