Re: [PATCH v2] hwmon: (lm75) Add support for Nuvoton NCT7715

[sashiko-bot@kernel.org]

Thank you for your contribution! Sashiko AI review found 1 potential issue(s) to consider:

Pre-existing issues:
- [High] Incorrect polarity mask used for 16-bit configuration registers, modifying a reserved bit instead of the actual polarity (POL) bit.
--

commit 7db614efb67592440d087e96063e9c50c4ebec00
Author: Sheng-Yuan Huang <syhuang3@nuvoton.com>

hwmon: (lm75) Add support for Nuvoton NCT7715

This commit adds support for the Nuvoton NCT7715 sensor, which is largely
compatible with the LM75 layout. It introduces a 16-bit configuration
register handling for this specific chip, including unique conversion-rate and
shutdown bit mappings.

> diff --git a/drivers/hwmon/lm75.c b/drivers/hwmon/lm75.c
> index 2d2d752aeac9d..ad7128629e56c 100644
> --- a/drivers/hwmon/lm75.c
> +++ b/drivers/hwmon/lm75.c
[ ... ]
> @@ -770,7 +805,7 @@ static int lm75_generic_probe(struct device *dev, const char *name,
>  	data->orig_conf = status;
>  
>  	/* Enforce polarity active-low (default) or active-high (devicetree) */
> -	if (!data->params->config_reg_16bits)
> +	if (!data->params->config_reg_16bits || data->kind == nct7715)
>  		pol_mask = LM75_ALERT_POLARITY_HIGH_8_BIT;
>  	else
>  		pol_mask = LM75_ALERT_POLARITY_HIGH_16_BIT;

[Severity: High]
This is a pre-existing issue, but does this logic in lm75_generic_probe()
apply an incorrect polarity mask for existing 16-bit sensors? 

By adding the bypass for nct7715, it avoids the issue for the new chip, but
it appears the mask used for other 16-bit chips like TMP112 or AS6200 
(LM75_ALERT_POLARITY_HIGH_16_BIT, defined as BIT(10)) targets Byte 2, bit 2. 

Since the SMBus word read natively places Byte 1 (containing the POL bit at 
bit 2) into the lower 8 bits, using BIT(10) might modify a reserved bit 
instead of the actual polarity bit. 

This could cause the thermal alert polarity configuration to silently fail
when a device tree configuration sets ti,alert-polarity-active-high for an
existing 16-bit LM75-compatible chip, breaking thermal alerts.

Could the mask for 16-bit registers be corrected for all devices instead of 
just bypassing it for the nct7715?

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Sashiko AI review · https://sashiko.dev/#/patchset/20260911072654.15722-1-syhuang3@nuvoton.com?part=1