From: "Dixit, Ashutosh" <ashutosh.dixit@intel.com>
To: Andi Shyti <andi.shyti@linux.intel.com>
Cc: Badal Nilawar <badal.nilawar@intel.com>,
linux-hwmon@vger.kernel.org, intel-gfx@lists.freedesktop.org,
dri-devel@lists.freedesktop.org
Subject: Re: [Intel-gfx] [PATCH 3/7] drm/i915/hwmon: Power PL1 limit and TDP setting
Date: Thu, 13 Oct 2022 08:54:00 -0700 [thread overview]
Message-ID: <87czavsorr.wl-ashutosh.dixit@intel.com> (raw)
In-Reply-To: <YztOiqUsMTzfK4q3@ashyti-mobl2.lan>
On Mon, 03 Oct 2022 14:05:14 -0700, Andi Shyti wrote:
>
> Hi Badal,
>
> [...]
>
> > hwm_get_preregistration_info(struct drm_i915_private *i915)
> > {
> > struct i915_hwmon *hwmon = i915->hwmon;
> > + struct intel_uncore *uncore = &i915->uncore;
> > + intel_wakeref_t wakeref;
> > + u32 val_sku_unit;
> >
> > - if (IS_DG1(i915) || IS_DG2(i915))
> > + if (IS_DG1(i915) || IS_DG2(i915)) {
> > hwmon->rg.gt_perf_status = GEN12_RPSTAT1;
> > - else
> > + hwmon->rg.pkg_power_sku_unit = PCU_PACKAGE_POWER_SKU_UNIT;
> > + hwmon->rg.pkg_power_sku = PCU_PACKAGE_POWER_SKU;
> > + hwmon->rg.pkg_rapl_limit = PCU_PACKAGE_RAPL_LIMIT;
> > + } else {
> > hwmon->rg.gt_perf_status = INVALID_MMIO_REG;
> > + hwmon->rg.pkg_power_sku_unit = INVALID_MMIO_REG;
> > + hwmon->rg.pkg_power_sku = INVALID_MMIO_REG;
> > + hwmon->rg.pkg_rapl_limit = INVALID_MMIO_REG;
> > + }
> > +
> > + with_intel_runtime_pm(uncore->rpm, wakeref) {
> > + /*
> > + * The contents of register hwmon->rg.pkg_power_sku_unit do not change,
> > + * so read it once and store the shift values.
> > + */
> > + if (i915_mmio_reg_valid(hwmon->rg.pkg_power_sku_unit)) {
> > + val_sku_unit = intel_uncore_read(uncore,
> > + hwmon->rg.pkg_power_sku_unit);
> > + } else {
> > + val_sku_unit = 0;
> > + }
>
> please remove the brackets here and, just a small nitpick:
>
> move val_sky_unit inside the "with_intel_runtime_pm()" and
> initialize it to '0', you will save the else statement.
Hi Andi, fixed in v9 of the series.
>
> Other than that:
>
> Reviewed-by: Andi Shyti <andi.shyti@linux.intel.com>
Thanks.
--
Ashutosh
next prev parent reply other threads:[~2022-10-13 15:54 UTC|newest]
Thread overview: 24+ messages / expand[flat|nested] mbox.gz Atom feed top
2022-09-27 5:50 [PATCH 0/7] drm/i915: Add HWMON support Badal Nilawar
2022-09-27 5:50 ` [PATCH 1/7] drm/i915/hwmon: Add HWMON infrastructure Badal Nilawar
2022-10-03 20:50 ` [Intel-gfx] " Andi Shyti
2022-09-27 5:50 ` [PATCH 2/7] drm/i915/hwmon: Add HWMON current voltage support Badal Nilawar
2022-10-03 20:56 ` [Intel-gfx] " Andi Shyti
2022-10-13 15:52 ` Dixit, Ashutosh
2022-09-27 5:50 ` [PATCH 3/7] drm/i915/hwmon: Power PL1 limit and TDP setting Badal Nilawar
2022-09-28 7:08 ` Gupta, Anshuman
2022-10-03 21:05 ` [Intel-gfx] " Andi Shyti
2022-10-13 15:54 ` Dixit, Ashutosh [this message]
2022-09-27 5:50 ` [PATCH 4/7] drm/i915/hwmon: Show device level energy usage Badal Nilawar
2022-09-30 16:52 ` Rodrigo Vivi
2022-10-03 21:13 ` [Intel-gfx] " Andi Shyti
2022-10-13 15:54 ` Dixit, Ashutosh
2022-10-13 15:54 ` Dixit, Ashutosh
2022-09-27 5:50 ` [PATCH 5/7] drm/i915/hwmon: Expose card reactive critical power Badal Nilawar
2022-10-03 21:18 ` [Intel-gfx] " Andi Shyti
2022-09-27 5:50 ` [PATCH 6/7] drm/i915/hwmon: Expose power1_max_interval Badal Nilawar
2022-09-28 7:09 ` Gupta, Anshuman
2022-10-03 21:32 ` [Intel-gfx] " Andi Shyti
2022-10-13 15:55 ` Dixit, Ashutosh
2022-09-27 5:50 ` [PATCH 7/7] drm/i915/hwmon: Extend power/energy for XEHPSDV Badal Nilawar
2022-10-03 21:40 ` [Intel-gfx] " Andi Shyti
-- strict thread matches above, loose matches on Subject: below --
2022-09-16 15:00 [PATCH 0/7] drm/i915: Add HWMON support Badal Nilawar
2022-09-16 15:00 ` [PATCH 3/7] drm/i915/hwmon: Power PL1 limit and TDP setting Badal Nilawar
2022-09-21 0:02 ` Dixit, Ashutosh
2022-09-21 11:44 ` [Intel-gfx] " Tvrtko Ursulin
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