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X-CSE-ConnectionGUID: V8fuBa87QpeSbHCULqTbIQ== X-CSE-MsgGUID: uZ5juxveTpeOQy3n3f0yjg== X-IronPort-AV: E=McAfee;i="6700,10204,11162"; a="24488318" X-IronPort-AV: E=Sophos;i="6.09,283,1716274800"; d="scan'208";a="24488318" Received: from fmviesa009.fm.intel.com ([10.60.135.149]) by fmvoesa107.fm.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 12 Aug 2024 06:50:57 -0700 X-CSE-ConnectionGUID: yU49dKNsSOSVTrqEuovdIg== X-CSE-MsgGUID: C6k8NsNYRsqMqzjvAcWSuw== X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="6.09,283,1716274800"; d="scan'208";a="58212835" Received: from slindbla-desk.ger.corp.intel.com (HELO intel.com) ([10.245.246.165]) by fmviesa009-auth.fm.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 12 Aug 2024 06:50:50 -0700 Date: Mon, 12 Aug 2024 15:50:47 +0200 From: Andi Shyti To: Raag Jadav Cc: jani.nikula@linux.intel.com, joonas.lahtinen@linux.intel.com, rodrigo.vivi@intel.com, tursulin@ursulin.net, airlied@gmail.com, daniel@ffwll.ch, linux@roeck-us.net, andi.shyti@linux.intel.com, andriy.shevchenko@linux.intel.com, intel-gfx@lists.freedesktop.org, dri-devel@lists.freedesktop.org, linux-hwmon@vger.kernel.org, linux-kernel@vger.kernel.org, anshuman.gupta@intel.com, badal.nilawar@intel.com, riana.tauro@intel.com, ashutosh.dixit@intel.com, karthik.poosa@intel.com Subject: Re: [PATCH v5] drm/i915/hwmon: expose fan speed Message-ID: References: <20240812081538.1457396-1-raag.jadav@intel.com> Precedence: bulk X-Mailing-List: linux-hwmon@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Type: text/plain; charset=us-ascii Content-Disposition: inline In-Reply-To: <20240812081538.1457396-1-raag.jadav@intel.com> Hi Raag, > +static int > +hwm_fan_read(struct hwm_drvdata *ddat, u32 attr, long *val) > +{ > + struct i915_hwmon *hwmon = ddat->hwmon; > + struct hwm_fan_info *fi = &ddat->fi; > + u64 rotations, time_now, time; > + intel_wakeref_t wakeref; > + u32 reg_val, pulses; > + int ret = 0; > + > + if (attr != hwmon_fan_input) > + return -EOPNOTSUPP; > + > + wakeref = intel_runtime_pm_get(ddat->uncore->rpm); > + mutex_lock(&hwmon->hwmon_lock); > + > + reg_val = intel_uncore_read(ddat->uncore, hwmon->rg.fan_speed); > + time_now = get_jiffies_64(); > + > + /* Handle HW register overflow */ > + if (reg_val >= fi->reg_val_prev) > + pulses = reg_val - fi->reg_val_prev; > + else > + pulses = UINT_MAX - fi->reg_val_prev + reg_val; > + > + /* > + * HW register value is accumulated count of pulses from > + * PWM fan with the scale of 2 pulses per rotation. > + */ > + rotations = pulses / 2; > + > + time = jiffies_delta_to_msecs(time_now - fi->time_prev); > + if (unlikely(!time)) { > + ret = -EAGAIN; > + goto exit; > + } Can you please add a comment describing how you obtain the speed calculation? Basically at every read you store the values. Is it possible that we don't have reads for a long time and the register resets more than once? Thanks, Andi > + /* > + * Convert to minutes for calculating RPM. > + * RPM = number of rotations * msecs per minute / time in msecs > + */ > + *val = DIV_ROUND_UP(rotations * (MSEC_PER_SEC * 60), time); > + > + fi->reg_val_prev = reg_val; > + fi->time_prev = time_now; > +exit: > + mutex_unlock(&hwmon->hwmon_lock); > + intel_runtime_pm_put(ddat->uncore->rpm, wakeref); > + return ret; > +}