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From: Ingo Molnar <mingo@kernel.org>
To: "Xin Li (Intel)" <xin@zytor.com>
Cc: linux-kernel@vger.kernel.org, kvm@vger.kernel.org,
	linux-perf-users@vger.kernel.org, linux-hyperv@vger.kernel.org,
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	kys@microsoft.com, haiyangz@microsoft.com, decui@microsoft.com,
	dapeng1.mi@linux.intel.com, ilpo.jarvinen@linux.intel.com
Subject: Re: [PATCH v4 02/15] x86/msr: Move rdtsc{,_ordered}() to <asm/tsc.h>
Date: Fri, 2 May 2025 10:02:26 +0200	[thread overview]
Message-ID: <aBR8EoYkxaFHwZN2@gmail.com> (raw)
In-Reply-To: <20250427092027.1598740-3-xin@zytor.com>


* Xin Li (Intel) <xin@zytor.com> wrote:

> index 94408a784c8e..13335a130edf 100644
> --- a/arch/x86/include/asm/tsc.h
> +++ b/arch/x86/include/asm/tsc.h
> @@ -7,7 +7,81 @@
>  
>  #include <asm/cpufeature.h>
>  #include <asm/processor.h>
> -#include <asm/msr.h>
> +
> +/*
> + * both i386 and x86_64 returns 64-bit value in edx:eax, but gcc's "A"
> + * constraint has different meanings. For i386, "A" means exactly
> + * edx:eax, while for x86_64 it doesn't mean rdx:rax or edx:eax. Instead,
> + * it means rax *or* rdx.
> + */
> +#ifdef CONFIG_X86_64
> +/* Using 64-bit values saves one instruction clearing the high half of low */
> +#define DECLARE_ARGS(val, low, high)	unsigned long low, high
> +#define EAX_EDX_VAL(val, low, high)	((low) | (high) << 32)
> +#define EAX_EDX_RET(val, low, high)	"=a" (low), "=d" (high)
> +#else
> +#define DECLARE_ARGS(val, low, high)	u64 val
> +#define EAX_EDX_VAL(val, low, high)	(val)
> +#define EAX_EDX_RET(val, low, high)	"=A" (val)
> +#endif

Meh, this patch creates a duplicate copy of DECLARE_ARGS() et al in 
<asm/tsc.h> now:

 arch/x86/include/asm/msr.h:#define DECLARE_ARGS(val, low, high) unsigned long low, high
 arch/x86/include/asm/msr.h:#define DECLARE_ARGS(val, low, high) u64 val
 arch/x86/include/asm/msr.h:     DECLARE_ARGS(val, low, high);
 arch/x86/include/asm/msr.h:     DECLARE_ARGS(val, low, high);
 arch/x86/include/asm/msr.h:     DECLARE_ARGS(val, low, high);
 arch/x86/include/asm/tsc.h:#define DECLARE_ARGS(val, low, high) unsigned long low, high
 arch/x86/include/asm/tsc.h:#define DECLARE_ARGS(val, low, high) u64 val
 arch/x86/include/asm/tsc.h:     DECLARE_ARGS(val, low, high);
 arch/x86/include/asm/tsc.h:     DECLARE_ARGS(val, low, high);
 arch/x86/include/asm/tsc.h:#undef DECLARE_ARGS

Which was both an undeclared change, bloats the code, causes various 
problems, and is totally unnecessary to boot.

Please don't do that ...

Thanks,

	Ingo

  reply	other threads:[~2025-05-02  8:02 UTC|newest]

Thread overview: 34+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2025-04-27  9:20 [PATCH v4 00/15] MSR code cleanup part one Xin Li (Intel)
2025-04-27  9:20 ` [PATCH v4 01/15] x86/msr: Add missing includes of <asm/msr.h> Xin Li (Intel)
2025-04-29  9:45   ` Ilpo Järvinen
2025-04-29 17:27     ` Xin Li
2025-04-30  4:20     ` Michael Kelley
2025-04-30  9:12       ` Xin Li
2025-04-30  8:41     ` Xin Li
2025-04-30  9:17       ` Ilpo Järvinen
2025-04-30 17:34         ` Xin Li
2025-05-01  5:42     ` [PATCH v4A " Xin Li (Intel)
2025-05-02 13:13       ` Ilpo Järvinen
2025-05-02 17:50         ` Xin Li
2025-04-27  9:20 ` [PATCH v4 02/15] x86/msr: Move rdtsc{,_ordered}() to <asm/tsc.h> Xin Li (Intel)
2025-05-02  8:02   ` Ingo Molnar [this message]
2025-05-02 18:09     ` Xin Li
2025-05-02  8:18   ` Ingo Molnar
2025-05-02 18:01     ` Xin Li
2025-05-02  8:52   ` Ingo Molnar
2025-05-02 18:00     ` Xin Li
2025-04-27  9:20 ` [PATCH v4 03/15] x86/msr: Remove rdpmc() Xin Li (Intel)
2025-04-27  9:20 ` [PATCH v4 04/15] x86/msr: Rename rdpmcl() to rdpmc() Xin Li (Intel)
2025-04-27  9:20 ` [PATCH v4 05/15] x86/msr: Convert the rdpmc() macro into an always inline function Xin Li (Intel)
2025-04-27  9:20 ` [PATCH v4 06/15] x86/xen/msr: Return u64 consistently in Xen PMC read functions Xin Li (Intel)
2025-04-27  9:20 ` [PATCH v4 07/15] x86/msr: Convert __wrmsr() uses to native_wrmsr{,q}() uses Xin Li (Intel)
2025-04-27  9:20 ` [PATCH v4 08/15] x86/msr: Add the native_rdmsrq() helper Xin Li (Intel)
2025-04-27  9:20 ` [PATCH v4 09/15] x86/msr: Convert __rdmsr() uses to native_rdmsrq() uses Xin Li (Intel)
2025-04-27  9:20 ` [PATCH v4 10/15] x86/xen/msr: Remove calling native_{read,write}_msr{,_safe}() in pmu_msr_{read,write}() Xin Li (Intel)
2025-05-02  8:30   ` Ingo Molnar
2025-04-27  9:20 ` [PATCH v4 11/15] x86/xen/msr: Remove pmu_msr_{read,write}() Xin Li (Intel)
2025-04-27  9:20 ` [PATCH v4 12/15] x86/xen/msr: Remove the error pointer argument from set_seg() Xin Li (Intel)
2025-04-27  9:20 ` [PATCH v4 13/15] x86/pvops/msr: refactor pv_cpu_ops.write_msr{,_safe}() Xin Li (Intel)
2025-04-27  9:20 ` [PATCH v4 14/15] x86/msr: Replace wrmsr(msr, low, 0) with wrmsrq(msr, low) Xin Li (Intel)
2025-04-27  9:20 ` [PATCH v4 15/15] x86/msr: Change the function type of native_read_msr_safe() Xin Li (Intel)
2025-05-02 14:13 ` [PATCH v4 00/15] MSR code cleanup part one Michael Kelley

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