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[2001:1c00:c1e:bf00:1054:9d19:e0f0:8214]) by smtp.gmail.com with ESMTPSA id e4sm1015832ejh.98.2021.05.06.02.38.47 (version=TLS1_3 cipher=TLS_AES_128_GCM_SHA256 bits=128/128); Thu, 06 May 2021 02:38:47 -0700 (PDT) Subject: Re: [PATCH v7 1/7] MAINTAINERS: Add Advantech AHC1EC0 embedded controller entry To: Andy Shevchenko Cc: Campion Kang , Lee Jones , Rob Herring , Mark Gross , Wim Van Sebroeck , Guenter Roeck , Jean Delvare , Jonathan Corbet , devicetree , Linux Kernel Mailing List , linux-watchdog@vger.kernel.org, linux-hwmon@vger.kernel.org, Linux Documentation List , Platform Driver , AceLan Kao References: <20210506081619.2443-1-campion.kang@advantech.com.tw> <6b86bd36-b934-c204-9e56-079ab8cd4b54@redhat.com> From: Hans de Goede Message-ID: Date: Thu, 6 May 2021 11:38:46 +0200 User-Agent: Mozilla/5.0 (X11; Linux x86_64; rv:78.0) Gecko/20100101 Thunderbird/78.8.1 MIME-Version: 1.0 In-Reply-To: Content-Type: text/plain; charset=utf-8 Content-Language: en-US Content-Transfer-Encoding: 7bit Precedence: bulk List-ID: X-Mailing-List: linux-hwmon@vger.kernel.org Hi, On 5/6/21 11:23 AM, Andy Shevchenko wrote: > On Thu, May 6, 2021 at 11:48 AM Hans de Goede wrote: >> I'm replying here since this series has no cover-letter, for >> the next version for a series touching so many different >> sub-systems it would be good to start with a cover-letter >> providing some background info on the series. >> >> I see this is binding to an ACPI device, yet it is also using >> devicetree bindings and properties. >> >> So I take it this means that your ACPI tables are using the >> optional capability of embedded device-tree blobs inside the >> ACPI tables ? >> >> That is an unusual combination on a x86 device, note it is >> not wrong > > It's actually not okay. We have agreed at some point with DT people, > that ACPI should not use non-native variants of natively supported > things. For example, it shouldn't use "interrupt" property for IOxAPIC > (or xIC) provided interrupts, rather Interrupt() has to be used and so > on. Right, but that is not the case here, they are using 2 device-tree properties (1), from patch 3/7: +properties: + compatible: + const: advantech,ahc1ec0 + + advantech,hwmon-profile: + description: + The number of sub-devices specified in the platform. Defines for the + hwmon profiles can found in dt-bindings/mfd/ahc1ec0-dt. + $ref: /schemas/types.yaml#/definitions/uint32 + maxItems: 1 + + advantech,has-watchdog: + description: + Some implementations of the EC include a watchdog used to monitor the + system. This boolean flag is used to specify whether this watchdog is + present or not. Default is true, otherwise set to false. + type: boolean >> but AFAIK you are the first to do this on x86. > > No, not the first. Once Intel tried to invent the pin control > configuration and muxing properties in ACPI, it was luckily rejected > (ACPI 6.x OTOH provides a set of special resources for that). > > So, NAK from me, *if* it's really the case. ACPI tables must be revisited. AFAIK Advantech are not defining things for which an ACPI standard exists, although these 2 properties might just as well may be 2 simple ACPI integer methods, which would actually make things a bit simpler (.e.g it would allow dropping patch 2/7 and 3/7 from the set). Campion, any reason why you went this route; and can the ACPI tables still be changed? Regards, Hans