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Tue, 25 Mar 2025 09:37:58 -0400 (EDT) X-Mailer: MessagingEngine.com Webmail Interface Precedence: bulk X-Mailing-List: linux-hwmon@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 X-ThreadId: T9168aded715bd4fc Date: Tue, 25 Mar 2025 14:37:36 +0100 From: "Arnd Bergmann" To: "Akshay Gupta" , linux-hwmon@vger.kernel.org, linux-kernel@vger.kernel.org Cc: "Guenter Roeck" , "Greg Kroah-Hartman" , shyam-sundar.s-k@amd.com, gautham.shenoy@amd.com, "Mario Limonciello" , naveenkrishna.chatradhi@amd.com, anand.umarji@amd.com Message-Id: In-Reply-To: References: <20250324145815.1026314-1-akshay.gupta@amd.com> <20250324145815.1026314-7-akshay.gupta@amd.com> Subject: Re: [PATCH v6 06/11] misc: amd-sbi: Add support for AMD_SBI IOCTL Content-Type: text/plain Content-Transfer-Encoding: 7bit On Tue, Mar 25, 2025, at 13:35, Gupta, Akshay wrote: > On 3/24/2025 9:10 PM, Arnd Bergmann wrote: > > Link for the documentation: > https://www.amd.com/content/dam/amd/en/documents/epyc-technical-docs/programmer-references/57883.zip > > You may refer to section: 5.4.2.2 SB-RMI Mailbox Service > At present, more than 70 mailbox commands ids are supported. > The number is increasing with each platforms. > however, the input and output for all mailbox commands are maintained > as 32 bit, hence, we can use the same structure and differentiate the > functionality. The large number of mailbox commands is exactly what I'm worried about. Having 70 well-documented ioctl command numbers is not a problem, since the numbers are cheap, but having an unfiltered pass-through inteface between userspace and a PMIC is scary, and it's worse if future hardware version has additional registers here. A lot of the values reported through this interface could simply be sysfs files, some look like they should integrate into existing kernel subsystems (scheduler, pci, ...) and not be directly visible to userspace. Arnd