From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-5.3 required=3.0 tests=DKIM_SIGNED,DKIM_VALID, DKIM_VALID_AU,FREEMAIL_FORGED_FROMDOMAIN,FREEMAIL_FROM, HEADER_FROM_DIFFERENT_DOMAINS,MAILING_LIST_MULTI,SIGNED_OFF_BY,SPF_HELO_NONE, SPF_PASS,USER_AGENT_SANE_1 autolearn=unavailable autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id DD0C7C4CED1 for ; Thu, 3 Oct 2019 17:37:29 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by mail.kernel.org (Postfix) with ESMTP id B5EF22086A for ; Thu, 3 Oct 2019 17:37:29 +0000 (UTC) Authentication-Results: mail.kernel.org; dkim=pass (2048-bit key) header.d=gmail.com header.i=@gmail.com header.b="WxTR1lav" Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S2388960AbfJCRhU (ORCPT ); Thu, 3 Oct 2019 13:37:20 -0400 Received: from mail-wr1-f66.google.com ([209.85.221.66]:41255 "EHLO mail-wr1-f66.google.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1730903AbfJCQDf (ORCPT ); Thu, 3 Oct 2019 12:03:35 -0400 Received: by mail-wr1-f66.google.com with SMTP id q9so3354385wrm.8; Thu, 03 Oct 2019 09:03:33 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20161025; h=date:from:to:cc:subject:message-id:references:mime-version :content-disposition:in-reply-to:user-agent; bh=td4245u+5WMfMu8EFRyzo+huDJgbvQAU/NaQvzgX56E=; b=WxTR1lavzcTXkB3F0JCQGlSMx9R7RG8Mo5tOrXKixIEnLLJPwyCdLtdpu4i9VUYir1 jDutWwSI3RsBgERF1i2kAliFxxZdTUDb8kG0y5RdNUzILH1807zN+iRmEvu2aTZ88E98 YleB3ZcC2OzmDsc7M9KrtgFSsIVvZLdPMJxpwh4Lrrlh4rYa7AikgH6sgmgjvynEa/xy UrCB7vpuegDNRMVKAlJ/Ug9h97eAFfb/GhVeBlyHCUXoV/a07Vf9qi1EXhxHzZQa1UgA +253fQBAqNM4LSXDYHo4Agd4EspVIO4EB1rBauvMFTkG6+WDj1M+t664j5qg8Wey6hHx GLDA== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:date:from:to:cc:subject:message-id:references :mime-version:content-disposition:in-reply-to:user-agent; bh=td4245u+5WMfMu8EFRyzo+huDJgbvQAU/NaQvzgX56E=; b=OQIxiUDSQqJZ7Z9ExLMOUdFyTbOVcsRmWaTscjw9Vp0vlUaLhf23GnL3l0hA73+hfQ SQf2xGLsCc39fpSTNNogxUvEEDVRfG5GqdQoGOsSihg+SQUST/73mclX6LJW9UhosCVR sPvU7n0vqJErID1jPkvFqqoMGSsg6sA98taWwCXA2z31xnS9zJVJrzOQ1wmLoN+9sfKA a7pE4w4wqK1qNdLidQHpoJ7ZNsQjIr97PmE0g2Q4hdSGGqqGWnEM+zyBhYob3jpNlarQ 5511PGtIeVt/UQYG6EH2NuI/uJqpKLyvuDVQKZgdu8utjvdYz3Axrcq86XHyCHMl+dxd eNSg== X-Gm-Message-State: APjAAAWr/qqrqBfBBBKlkdtkdda0Bsy4hLysm2XRyizH3q+VCAdfKtdo pubHfkIurihsXiAvCj6Ad+l9EB7zGtUNytMA X-Google-Smtp-Source: APXvYqxdGdyWERq67KP37ldw2C5SCEmftU5/nMj5EKEH3J3jjKK221iaaCdmU5w8/PTUv0fIvewEZA== X-Received: by 2002:adf:db0f:: with SMTP id s15mr7869305wri.120.1570118612657; Thu, 03 Oct 2019 09:03:32 -0700 (PDT) Received: from andrea.guest.corp.microsoft.com ([2a01:110:8012:1010:414b:bdc7:a2f9:15b6]) by smtp.gmail.com with ESMTPSA id s12sm4990484wra.82.2019.10.03.09.03.31 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Thu, 03 Oct 2019 09:03:32 -0700 (PDT) Date: Thu, 3 Oct 2019 18:03:26 +0200 From: Andrea Parri To: linux-kernel@vger.kernel.org, linux-hyperv@vger.kernel.org, x86@kernel.org Cc: "K . Y . Srinivasan" , Haiyang Zhang , Stephen Hemminger , Sasha Levin , Thomas Gleixner , Ingo Molnar , Borislav Petkov , "H . Peter Anvin" , Michael Kelley Subject: Re: [PATCH 1/2] x86/hyperv: Allow guests to enable InvariantTSC Message-ID: <20191003160326.GA22098@andrea.guest.corp.microsoft.com> References: <20191003155200.22022-1-parri.andrea@gmail.com> MIME-Version: 1.0 Content-Type: text/plain; charset=us-ascii Content-Disposition: inline In-Reply-To: <20191003155200.22022-1-parri.andrea@gmail.com> User-Agent: Mutt/1.10.1 (2018-07-13) Sender: linux-hyperv-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-hyperv@vger.kernel.org On Thu, Oct 03, 2019 at 05:52:00PM +0200, Andrea Parri wrote: > If the hardware supports TSC scaling, Hyper-V will set bit 15 of the > HV_PARTITION_PRIVILEGE_MASK in guest VMs with a compatible Hyper-V > configuration version. Bit 15 corresponds to the > AccessTscInvariantControls privilege. If this privilege bit is set, > guests can access the HvSyntheticInvariantTscControl MSR: guests can > set bit 0 of this synthetic MSR to enable the InvariantTSC feature. > After setting the synthetic MSR, CPUID will enumerate support for > InvariantTSC. > > Signed-off-by: Andrea Parri Subject should have been "[PATCH] ...", i.e., there is no 2/2 planned (not for this patchset at least). Please let me know if I should re- submit with the subject fixed. Thanks, Andrea