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From: Zhi Wang <zhi.wang.linux@gmail.com>
To: Tianyu Lan <ltykernel@gmail.com>
Cc: luto@kernel.org, tglx@linutronix.de, mingo@redhat.com,
	bp@alien8.de, dave.hansen@linux.intel.com, x86@kernel.org,
	hpa@zytor.com, seanjc@google.com, pbonzini@redhat.com,
	jgross@suse.com, tiala@microsoft.com, kirill@shutemov.name,
	jiangshan.ljs@antgroup.com, peterz@infradead.org,
	ashish.kalra@amd.com, srutherford@google.com,
	akpm@linux-foundation.org, anshuman.khandual@arm.com,
	pawan.kumar.gupta@linux.intel.com, adrian.hunter@intel.com,
	daniel.sneddon@linux.intel.com,
	alexander.shishkin@linux.intel.com, sandipan.das@amd.com,
	ray.huang@amd.com, brijesh.singh@amd.com, michael.roth@amd.com,
	thomas.lendacky@amd.com, venu.busireddy@oracle.com,
	sterritt@google.com, tony.luck@intel.com,
	samitolvanen@google.com, fenghua.yu@intel.com,
	linux-kernel@vger.kernel.org, kvm@vger.kernel.org,
	linux-hyperv@vger.kernel.org, linux-arch@vger.kernel.org
Subject: Re: [RFC PATCH V3 16/16] x86/sev: Fix interrupt exit code paths from #HV exception
Date: Fri, 3 Feb 2023 01:20:28 +0200	[thread overview]
Message-ID: <20230203012028.00005ff3@gmail.com> (raw)
In-Reply-To: <20230122024607.788454-17-ltykernel@gmail.com>

On Sat, 21 Jan 2023 21:46:06 -0500
Tianyu Lan <ltykernel@gmail.com> wrote:

> From: Ashish Kalra <ashish.kalra@amd.com>
> 
> Add checks in interrupt exit code paths in case of returns
> to user mode to check if currently executing the #HV handler
> then don't follow the irqentry_exit_to_user_mode path as
> that can potentially cause the #HV handler to be
> preempted and rescheduled on another CPU. Rescheduled #HV
> handler on another cpu will cause interrupts to be handled
> on a different cpu than the injected one, causing
> invalid EOIs and missed/lost guest interrupts and
> corresponding hangs and/or per-cpu IRQs handled on
> non-intended cpu.
> 

Why doesn't this problem happen in #VC handler? As #VC handler doesn't have
this special handling.

> Signed-off-by: Ashish Kalra <ashish.kalra@amd.com>
> ---
>  arch/x86/include/asm/idtentry.h | 66 +++++++++++++++++++++++++++++++++
>  arch/x86/kernel/sev.c           | 30 +++++++++++++++
>  2 files changed, 96 insertions(+)
> 
> diff --git a/arch/x86/include/asm/idtentry.h b/arch/x86/include/asm/idtentry.h
> index 652fea10d377..45b47132be7c 100644
> --- a/arch/x86/include/asm/idtentry.h
> +++ b/arch/x86/include/asm/idtentry.h
> @@ -13,6 +13,10 @@
>  
>  #include <asm/irq_stack.h>
>  
> +#ifdef CONFIG_AMD_MEM_ENCRYPT
> +noinstr void irqentry_exit_hv_cond(struct pt_regs *regs, irqentry_state_t state);
> +#endif
> +
>  /**
>   * DECLARE_IDTENTRY - Declare functions for simple IDT entry points
>   *		      No error code pushed by hardware
> @@ -176,6 +180,7 @@ __visible noinstr void func(struct pt_regs *regs, unsigned long error_code)
>  #define DECLARE_IDTENTRY_IRQ(vector, func)				\
>  	DECLARE_IDTENTRY_ERRORCODE(vector, func)
>  
> +#ifndef CONFIG_AMD_MEM_ENCRYPT
>  /**
>   * DEFINE_IDTENTRY_IRQ - Emit code for device interrupt IDT entry points
>   * @func:	Function name of the entry point
> @@ -205,6 +210,26 @@ __visible noinstr void func(struct pt_regs *regs,			\
>  }									\
>  									\
>  static noinline void __##func(struct pt_regs *regs, u32 vector)
> +#else
> +
> +#define DEFINE_IDTENTRY_IRQ(func)					\
> +static void __##func(struct pt_regs *regs, u32 vector);		\
> +									\
> +__visible noinstr void func(struct pt_regs *regs,			\
> +			    unsigned long error_code)			\
> +{									\
> +	irqentry_state_t state = irqentry_enter(regs);			\
> +	u32 vector = (u32)(u8)error_code;				\
> +									\
> +	instrumentation_begin();					\
> +	kvm_set_cpu_l1tf_flush_l1d();					\
> +	run_irq_on_irqstack_cond(__##func, regs, vector);		\
> +	instrumentation_end();						\
> +	irqentry_exit_hv_cond(regs, state);				\
> +}									\
> +									\
> +static noinline void __##func(struct pt_regs *regs, u32 vector)
> +#endif
>  
>  /**
>   * DECLARE_IDTENTRY_SYSVEC - Declare functions for system vector entry points
> @@ -221,6 +246,7 @@ static noinline void __##func(struct pt_regs *regs, u32 vector)
>  #define DECLARE_IDTENTRY_SYSVEC(vector, func)				\
>  	DECLARE_IDTENTRY(vector, func)
>  
> +#ifndef CONFIG_AMD_MEM_ENCRYPT
>  /**
>   * DEFINE_IDTENTRY_SYSVEC - Emit code for system vector IDT entry points
>   * @func:	Function name of the entry point
> @@ -245,6 +271,26 @@ __visible noinstr void func(struct pt_regs *regs)			\
>  }									\
>  									\
>  static noinline void __##func(struct pt_regs *regs)
> +#else
> +
> +#define DEFINE_IDTENTRY_SYSVEC(func)					\
> +static void __##func(struct pt_regs *regs);				\
> +									\
> +__visible noinstr void func(struct pt_regs *regs)			\
> +{									\
> +	irqentry_state_t state = irqentry_enter(regs);			\
> +									\
> +	instrumentation_begin();					\
> +	kvm_set_cpu_l1tf_flush_l1d();					\
> +	run_sysvec_on_irqstack_cond(__##func, regs);			\
> +	instrumentation_end();						\
> +	irqentry_exit_hv_cond(regs, state);				\
> +}									\
> +									\
> +static noinline void __##func(struct pt_regs *regs)
> +#endif
> +
> +#ifndef CONFIG_AMD_MEM_ENCRYPT
>  
>  /**
>   * DEFINE_IDTENTRY_SYSVEC_SIMPLE - Emit code for simple system vector IDT
> @@ -274,6 +320,26 @@ __visible noinstr void func(struct pt_regs *regs)			\
>  }									\
>  									\
>  static __always_inline void __##func(struct pt_regs *regs)
> +#else
> +
> +#define DEFINE_IDTENTRY_SYSVEC_SIMPLE(func)				\
> +static __always_inline void __##func(struct pt_regs *regs);		\
> +									\
> +__visible noinstr void func(struct pt_regs *regs)			\
> +{									\
> +	irqentry_state_t state = irqentry_enter(regs);			\
> +									\
> +	instrumentation_begin();					\
> +	__irq_enter_raw();						\
> +	kvm_set_cpu_l1tf_flush_l1d();					\
> +	__##func(regs);						\
> +	__irq_exit_raw();						\
> +	instrumentation_end();						\
> +	irqentry_exit_hv_cond(regs, state);				\
> +}									\
> +									\
> +static __always_inline void __##func(struct pt_regs *regs)
> +#endif
>  
>  /**
>   * DECLARE_IDTENTRY_XENCB - Declare functions for XEN HV callback entry point
> diff --git a/arch/x86/kernel/sev.c b/arch/x86/kernel/sev.c
> index b1a98c2a52f8..23f15e95838b 100644
> --- a/arch/x86/kernel/sev.c
> +++ b/arch/x86/kernel/sev.c
> @@ -147,6 +147,10 @@ struct sev_hv_doorbell_page {
>  
>  struct sev_snp_runtime_data {
>  	struct sev_hv_doorbell_page hv_doorbell_page;
> +	/*
> +	 * Indication that we are currently handling #HV events.
> +	 */
> +	bool hv_handling_events;
>  };
>  
>  static DEFINE_PER_CPU(struct sev_snp_runtime_data*, snp_runtime_data);
> @@ -200,6 +204,8 @@ static void do_exc_hv(struct pt_regs *regs)
>  	union hv_pending_events pending_events;
>  	u8 vector;
>  
> +	this_cpu_read(snp_runtime_data)->hv_handling_events = true;
> +
>  	while (sev_hv_pending()) {
>  		pending_events.events = xchg(
>  			&sev_snp_current_doorbell_page()->pending_events.events,
> @@ -234,6 +240,8 @@ static void do_exc_hv(struct pt_regs *regs)
>  			common_interrupt(regs, pending_events.vector);
>  		}
>  	}
> +
> +	this_cpu_read(snp_runtime_data)->hv_handling_events = false;
>  }
>  
>  static __always_inline bool on_vc_stack(struct pt_regs *regs)
> @@ -2529,3 +2537,25 @@ static int __init snp_init_platform_device(void)
>  	return 0;
>  }
>  device_initcall(snp_init_platform_device);
> +
> +noinstr void irqentry_exit_hv_cond(struct pt_regs *regs, irqentry_state_t state)
> +{
> +	/*
> +	 * Check whether this returns to user mode, if so and if
> +	 * we are currently executing the #HV handler then we don't
> +	 * want to follow the irqentry_exit_to_user_mode path as
> +	 * that can potentially cause the #HV handler to be
> +	 * preempted and rescheduled on another CPU. Rescheduled #HV
> +	 * handler on another cpu will cause interrupts to be handled
> +	 * on a different cpu than the injected one, causing
> +	 * invalid EOIs and missed/lost guest interrupts and
> +	 * corresponding hangs and/or per-cpu IRQs handled on
> +	 * non-intended cpu.
> +	 */
> +	if (user_mode(regs) &&
> +	    this_cpu_read(snp_runtime_data)->hv_handling_events)
> +		return;
> +
> +	/* follow normal interrupt return/exit path */
> +	irqentry_exit(regs, state);
> +}


  reply	other threads:[~2023-02-02 23:20 UTC|newest]

Thread overview: 60+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2023-01-22  2:45 [RFC PATCH V3 00/16] x86/hyperv/sev: Add AMD sev-snp enlightened guest support on hyperv Tianyu Lan
2023-01-22  2:45 ` [RFC PATCH V3 01/16] x86/hyperv: Add sev-snp enlightened guest specific config Tianyu Lan
2023-01-31 17:34   ` Michael Kelley (LINUX)
2023-02-02  4:01     ` Tianyu Lan
2023-01-22  2:45 ` [RFC PATCH V3 02/16] x86/hyperv: Decrypt hv vp assist page in sev-snp enlightened guest Tianyu Lan
2023-01-22  2:45 ` [RFC PATCH V3 03/16] x86/hyperv: Set Virtual Trust Level in vmbus init message Tianyu Lan
2023-01-31 17:55   ` Michael Kelley (LINUX)
2023-02-03  3:32     ` Tianyu Lan
2023-01-22  2:45 ` [RFC PATCH V3 04/16] x86/hyperv: Use vmmcall to implement Hyper-V hypercall in sev-snp enlightened guest Tianyu Lan
2023-01-22  2:45 ` [RFC PATCH V3 05/16] clocksource/drivers/hyper-v: decrypt hyperv tsc page " Tianyu Lan
2023-01-22  2:45 ` [RFC PATCH V3 06/16] x86/hyperv: decrypt vmbus pages for " Tianyu Lan
2023-01-31 17:58   ` Michael Kelley (LINUX)
2023-02-03  4:11     ` Tianyu Lan
2023-01-22  2:45 ` [RFC PATCH V3 07/16] drivers: hv: Decrypt percpu hvcall input arg page in " Tianyu Lan
2023-01-31 18:02   ` Michael Kelley (LINUX)
2023-02-03  5:23     ` Tianyu Lan
2023-01-22  2:45 ` [RFC PATCH V3 08/16] x86/hyperv: Initialize cpu and memory for " Tianyu Lan
2023-01-31 18:20   ` Michael Kelley (LINUX)
2023-02-03  5:58     ` Tianyu Lan
2023-01-22  2:45 ` [RFC PATCH V3 09/16] x86/hyperv: SEV-SNP enlightened guest don't support legacy rtc Tianyu Lan
2023-01-31 14:03   ` Wei Liu
2023-02-02  3:43     ` Tianyu Lan
2023-01-22  2:46 ` [RFC PATCH V3 10/16] x86/hyperv: Add smp support for sev-snp guest Tianyu Lan
2023-01-23 15:30   ` Tom Lendacky
2023-02-03  7:00     ` Tianyu Lan
2023-02-06 20:11       ` Borislav Petkov
2023-02-07 13:49         ` Tianyu Lan
2023-01-31 18:34   ` Michael Kelley (LINUX)
2023-02-03  6:10     ` Tianyu Lan
2023-01-22  2:46 ` [RFC PATCH V3 11/16] x86/hyperv: Add hyperv-specific hadling for VMMCALL under SEV-ES Tianyu Lan
2023-01-22  2:46 ` [RFC PATCH V3 12/16] x86/sev: Add a #HV exception handler Tianyu Lan
2023-01-23  7:33   ` Gupta, Pankaj
2023-02-03  7:27     ` Tianyu Lan
2023-02-16 13:50       ` Gupta, Pankaj
2023-03-09 11:48   ` Gupta, Pankaj
2023-03-10 15:48     ` Tianyu Lan
2023-03-31 15:57   ` Borislav Petkov
2023-04-03 18:09     ` Tianyu Lan
2023-01-22  2:46 ` [RFC PATCH V3 13/16] x86/sev: Add Check of #HV event in path Tianyu Lan
2023-03-01 11:11   ` Gupta, Pankaj
2023-03-08 16:18     ` Gupta, Pankaj
2023-03-10 15:59       ` Tianyu Lan
2023-01-22  2:46 ` [RFC PATCH V3 14/16] x86/sev: Initialize #HV doorbell and handle interrupt requests Tianyu Lan
2023-02-16 14:46   ` Gupta, Pankaj
2023-02-17 12:45   ` Gupta, Pankaj
2023-03-01 19:34   ` Gupta, Pankaj
2023-01-22  2:46 ` [RFC PATCH V3 15/16] x86/sev: optimize system vector processing invoked from #HV exception Tianyu Lan
2023-01-22  2:46 ` [RFC PATCH V3 16/16] x86/sev: Fix interrupt exit code paths " Tianyu Lan
2023-02-02 23:20   ` Zhi Wang [this message]
2023-02-08 23:53     ` Kalra, Ashish
2023-02-21 16:44   ` Gupta, Pankaj
2023-03-10 16:02     ` Tianyu Lan
2023-02-02 23:00 ` [RFC PATCH V3 00/16] x86/hyperv/sev: Add AMD sev-snp enlightened guest support on hyperv Zhi Wang
2023-02-03  4:04   ` Michael Kelley (LINUX)
2023-02-09 11:36 ` Gupta, Pankaj
2023-02-17 12:47   ` Gupta, Pankaj
2023-02-18  7:15     ` Tianyu Lan
2023-03-10 15:35     ` Gupta, Pankaj
2023-03-10 16:19       ` Tianyu Lan
2023-03-15  6:40         ` Gupta, Pankaj

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