From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from mgamail.intel.com (mgamail.intel.com [192.198.163.12]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id DBD2035942; Fri, 19 Sep 2025 02:53:38 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=192.198.163.12 ARC-Seal:i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1758250420; cv=none; b=mJJOg8GL4uUNVNh/h6QrQGeSQ82Ku7CgCQz6KclZmR4Wq1f1T9KKFSu3f/VYb+Nn7Jurn43c0LFHTFkucCO5UIPBqFLMfnbraK5hQOB6D1BmMKEUxggq9jktKIQoXFs65DxriovUOkw7qaO8oLtOVibhFaQknxINS7A0S1/0dIE= ARC-Message-Signature:i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1758250420; c=relaxed/simple; bh=j82TMQoQw7EKWFSP4Sw60PGiritoIjvbYGE4+qDeWww=; h=Date:From:To:Cc:Subject:Message-ID:References:MIME-Version: Content-Type:Content-Disposition:In-Reply-To; b=SUTqAeUg4gNVxARfxWnx3DhlycSC+DyVptKiZP5LGH8v7T4ib7jf0pPZsu2b8JCpap1FUo6rFR/LFDGlCUqtUzqbS/Pn5aOf74Lghc48bOCBiqi8dawx6ODFNoC+jlI5aVDGJn7HIJw6v8RJ6AkmU+LG80eHlHNv04uB6gTMbrc= ARC-Authentication-Results:i=1; smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=linux.intel.com; spf=none smtp.mailfrom=linux.intel.com; dkim=pass (2048-bit key) header.d=intel.com header.i=@intel.com header.b=CTa9HBGn; arc=none smtp.client-ip=192.198.163.12 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=linux.intel.com Authentication-Results: smtp.subspace.kernel.org; spf=none smtp.mailfrom=linux.intel.com Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=intel.com header.i=@intel.com header.b="CTa9HBGn" DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=intel.com; i=@intel.com; q=dns/txt; s=Intel; t=1758250419; x=1789786419; h=date:from:to:cc:subject:message-id:references: mime-version:in-reply-to; bh=j82TMQoQw7EKWFSP4Sw60PGiritoIjvbYGE4+qDeWww=; b=CTa9HBGnkBc5Hfe4CY55jJD+jERKLEfXtzvGipr2/STUwmiflAcELmGX qyZLUnODjCW0KuA4O85LNCIVdOifDRwbkqBBjZ/EEGpHor7VSHcb5iLx4 h0lLNnvs2WY77d+YPIYhMAfqymkU1tsLQhjc5i9zTQNGxWd3lFIznW7oC /pzb6CL1L0MqbcGQw5/726o8Ag3sq1xLzzgF0ZxEXq3bBhp4y+YZtB3HV +Sk9VwS4mkSZTDyZ0aJgYIsHVoxKoz+qa0TA3PBeoUoN/799sjIC/ERSS MAY0E7KfUcLAT9rckwO2VDBDiGDnv1rj+p+Y+5jcPcIRCX1cFsRindkvZ A==; X-CSE-ConnectionGUID: GZz2Ek1nSn+kUmscPoe6Gg== X-CSE-MsgGUID: UZGboaPnTEiZ6tNUAQIC5A== X-IronPort-AV: E=McAfee;i="6800,10657,11557"; a="64414305" X-IronPort-AV: E=Sophos;i="6.18,276,1751266800"; d="scan'208";a="64414305" Received: from fmviesa007.fm.intel.com ([10.60.135.147]) by fmvoesa106.fm.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 18 Sep 2025 19:53:38 -0700 X-CSE-ConnectionGUID: XyYy/EE/TimXwY7VKuwmQw== X-CSE-MsgGUID: 4nZwnVAAS7aBonngmyHF9w== X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="6.18,276,1751266800"; d="scan'208";a="175328006" Received: from ranerica-svr.sc.intel.com ([172.25.110.23]) by fmviesa007.fm.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 18 Sep 2025 19:53:38 -0700 Date: Thu, 18 Sep 2025 19:59:28 -0700 From: Ricardo Neri To: x86@kernel.org, Krzysztof Kozlowski , Conor Dooley , Rob Herring , "K. Y. Srinivasan" , Haiyang Zhang , Wei Liu , Dexuan Cui , Michael Kelley , "Rafael J. Wysocki" Cc: Saurabh Sengar , Chris Oo , "Kirill A. Shutemov" , linux-hyperv@vger.kernel.org, devicetree@vger.kernel.org, linux-acpi@vger.kernel.org, linux-kernel@vger.kernel.org, Ricardo Neri , Yunhong Jiang , Thomas Gleixner Subject: Re: [PATCH v5 00/10] x86/hyperv/hv_vtl: Use a wakeup mailbox to boot secondary CPUs Message-ID: <20250919025928.GA9212@ranerica-svr.sc.intel.com> References: <20250627-rneri-wakeup-mailbox-v5-0-df547b1d196e@linux.intel.com> <20250820231135.GA24797@ranerica-svr.sc.intel.com> Precedence: bulk X-Mailing-List: linux-hyperv@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Type: text/plain; charset=us-ascii Content-Disposition: inline In-Reply-To: <20250820231135.GA24797@ranerica-svr.sc.intel.com> User-Agent: Mutt/1.9.4 (2018-02-28) On Wed, Aug 20, 2025 at 04:11:35PM -0700, Ricardo Neri wrote: > On Fri, Jun 27, 2025 at 08:35:06PM -0700, Ricardo Neri wrote: > > Hi, > > > > Here is a new version of this series. Thanks to Rafael for his feedback! > > I incorporated his feedback in this updated version. Please see the > > changelog for details. > > > > If the DeviceTree bindings look good, then the patches should be ready for > > review by the x86, ACPI, and Hyper-V maintainers. > > > > I did not change the cover letter but I included it here for completeness. > > > > Thanks in advance for your feedback! > > Hello, > > I would like to know what else is needed to move this patchset forward. > Rafael and Rob have reviewed the DeviceTree bindings. Rafael has reviewed > the relocation of the code that makes use of the mailbox. > > Would it be possible for the Hyper-V maintainers to take a look (Michael > Kelley has reviewed the patches already)? Perhaps this could increase the > confidence of the x86 maintainers. Many thanks Dexuan for reviewing this series. Now that the relevant subsystem maintainers have reviewed their portions of the series, perhaps the x86 maintainers could take a look? Thanks in advance! BR, Ricardo