From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from smtp.kernel.org (aws-us-west-2-korg-mail-1.web.codeaurora.org [10.30.226.201]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 41D2234B661; Fri, 13 Feb 2026 11:00:15 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=10.30.226.201 ARC-Seal:i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1770980415; cv=none; b=mnTbH0NMrRr9Sf1CNsqsgrtwDvRNByaxyXmKT9JgrfXaYPDUUT0n1xLnpm/DSb55i3Npy2gGzzQtu3hIUOxnJX5lTKgPUZeAcyJOaCUqQoFCB6xMFAlk3bo2OoRWh2nB9q3Hjvcz/yAuZHggZEhhf3CpgwfhpEdZcqc20oUnxv4= ARC-Message-Signature:i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1770980415; c=relaxed/simple; bh=a19PQ2D2C2DCb3hfZ+sOatc/4oV1zbjy3TOeGnf+Dj8=; h=From:To:Cc:Subject:Date:Message-ID:In-Reply-To:References: MIME-Version:Content-Type; b=ZB5PzdrQpMRjLpT69Hk5QM92T6ETHQNzqPH451SmezN0LMpheK2rl0wOodRTd4C9+slx0LvlFr6/R770vK5W5EGmaEk4XG1CwSZ4Chx51VE+Ld/sJg+kFuoEcQjvcmmy68RVxNqGWLGDkAeoiJNrKiFAdyChqiPWmIcPQwJ8+wc= ARC-Authentication-Results:i=1; smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=kernel.org header.i=@kernel.org header.b=KHRERZpq; arc=none smtp.client-ip=10.30.226.201 Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=kernel.org header.i=@kernel.org header.b="KHRERZpq" Received: by smtp.kernel.org (Postfix) with ESMTPSA id 4DC9CC16AAE; Fri, 13 Feb 2026 11:00:14 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=kernel.org; s=k20201202; t=1770980415; bh=a19PQ2D2C2DCb3hfZ+sOatc/4oV1zbjy3TOeGnf+Dj8=; h=From:To:Cc:Subject:Date:In-Reply-To:References:From; b=KHRERZpq/kwOnJlNAtMLy4ABMFIGwIy5tc67If7UpWtDkSgv5sTONi3R4nhmT2JIK iEmzfC47O8p/WdQGQzKSuBGmuLoLNGe32yGqNXuWZHsqCjfLROaUWepxVXv9aJ0IjM u7ZbgPgUM3gSo8wZCpU+j7SmP+2BVJGdKLDbQCv1AVFiz8GhMcN71K2fUEu+VfODk/ Ry7cdQ3wthFxhPZh2BlaiYjanhFqlDTu8PMl51sRjtzI1ctNS0qx5eW/GPFJkpHnAk 0XV3jq633YSL8kRZ0UFRB/5ftBEhglJimbAoXP15VmvYmGaoKPn7TFCL57h725n8Gi oz9535P/Opeqg== From: Leon Romanovsky To: Jason Gunthorpe , Leon Romanovsky , Selvin Xavier , Kalesh AP , Potnuri Bharat Teja , Michael Margolin , Gal Pressman , Yossi Leybovich , Cheng Xu , Kai Shen , Chengchang Tang , Junxian Huang , Abhijit Gangurde , Allen Hubbe , Krzysztof Czurylo , Tatyana Nikolova , Long Li , Konstantin Taranov , Yishai Hadas , Michal Kalderon , Bryan Tan , Vishnu Dasa , Broadcom internal kernel review list , Christian Benvenuti , Nelson Escobar , Dennis Dalessandro , Bernard Metzler , Zhu Yanjun Cc: linux-kernel@vger.kernel.org, linux-rdma@vger.kernel.org, linux-hyperv@vger.kernel.org Subject: [PATCH rdma-next 19/50] RDMA/ionic: Split user and kernel CQ creation paths Date: Fri, 13 Feb 2026 12:57:55 +0200 Message-ID: <20260213-refactor-umem-v1-19-f3be85847922@nvidia.com> X-Mailer: git-send-email 2.53.0 In-Reply-To: <20260213-refactor-umem-v1-0-f3be85847922@nvidia.com> References: <20260213-refactor-umem-v1-0-f3be85847922@nvidia.com> Precedence: bulk X-Mailing-List: linux-hyperv@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" X-Mailer: b4 0.15-dev-47773 Content-Transfer-Encoding: 8bit From: Leon Romanovsky Separate the CQ creation logic into distinct kernel and user flows. The ionic driver may allocate two umems per CQ, and the current layout prevents it from supporting generic umem sources (VMA, dmabuf, memfd, and others). Signed-off-by: Leon Romanovsky --- drivers/infiniband/hw/ionic/ionic_controlpath.c | 88 +++++++++++++++++-------- drivers/infiniband/hw/ionic/ionic_ibdev.c | 1 + drivers/infiniband/hw/ionic/ionic_ibdev.h | 2 + 3 files changed, 64 insertions(+), 27 deletions(-) diff --git a/drivers/infiniband/hw/ionic/ionic_controlpath.c b/drivers/infiniband/hw/ionic/ionic_controlpath.c index ea12d9b8e125..5b8b6baaf5d4 100644 --- a/drivers/infiniband/hw/ionic/ionic_controlpath.c +++ b/drivers/infiniband/hw/ionic/ionic_controlpath.c @@ -89,7 +89,7 @@ int ionic_create_cq_common(struct ionic_vcq *vcq, cq->vcq = vcq; - if (attr->cqe < 1 || attr->cqe + IONIC_CQ_GRACE > 0xffff) { + if (attr->cqe > 0xffff - IONIC_CQ_GRACE) { rc = -EINVAL; goto err_args; } @@ -1209,8 +1209,8 @@ static int ionic_destroy_cq_cmd(struct ionic_ibdev *dev, u32 cqid) return ionic_admin_wait(dev, &wr, IONIC_ADMIN_F_TEARDOWN); } -int ionic_create_cq(struct ib_cq *ibcq, const struct ib_cq_init_attr *attr, - struct uverbs_attr_bundle *attrs) +int ionic_create_user_cq(struct ib_cq *ibcq, const struct ib_cq_init_attr *attr, + struct uverbs_attr_bundle *attrs) { struct ionic_ibdev *dev = to_ionic_ibdev(ibcq->device); struct ib_udata *udata = &attrs->driver_udata; @@ -1222,21 +1222,18 @@ int ionic_create_cq(struct ib_cq *ibcq, const struct ib_cq_init_attr *attr, struct ionic_cq_req req; int udma_idx = 0, rc; - if (udata) { - rc = ib_copy_from_udata(&req, udata, sizeof(req)); - if (rc) - return rc; - } + if (ibcq->umem) + return -EOPNOTSUPP; - vcq->udma_mask = BIT(dev->lif_cfg.udma_count) - 1; + rc = ib_copy_from_udata(&req, udata, sizeof(req)); + if (rc) + return rc; - if (udata) - vcq->udma_mask &= req.udma_mask; + vcq->udma_mask = BIT(dev->lif_cfg.udma_count) - 1; + vcq->udma_mask &= req.udma_mask; - if (!vcq->udma_mask) { - rc = -EINVAL; - goto err_init; - } + if (!vcq->udma_mask) + return -EINVAL; for (; udma_idx < dev->lif_cfg.udma_count; ++udma_idx) { if (!(vcq->udma_mask & BIT(udma_idx))) @@ -1247,24 +1244,25 @@ int ionic_create_cq(struct ib_cq *ibcq, const struct ib_cq_init_attr *attr, &resp.cqid[udma_idx], udma_idx); if (rc) - goto err_init; + goto err_resp; rc = ionic_create_cq_cmd(dev, ctx, &vcq->cq[udma_idx], &buf); - if (rc) - goto err_cmd; + if (rc) { + ionic_pgtbl_unbuf(dev, &buf); + ionic_destroy_cq_common(dev, &vcq->cq[udma_idx]); + goto err_resp; + } ionic_pgtbl_unbuf(dev, &buf); } vcq->ibcq.cqe = attr->cqe; - if (udata) { - resp.udma_mask = vcq->udma_mask; + resp.udma_mask = vcq->udma_mask; - rc = ib_copy_to_udata(udata, &resp, sizeof(resp)); - if (rc) - goto err_resp; - } + rc = ib_copy_to_udata(udata, &resp, sizeof(resp)); + if (rc) + goto err_resp; return 0; @@ -1274,11 +1272,47 @@ int ionic_create_cq(struct ib_cq *ibcq, const struct ib_cq_init_attr *attr, if (!(vcq->udma_mask & BIT(udma_idx))) continue; ionic_destroy_cq_cmd(dev, vcq->cq[udma_idx].cqid); -err_cmd: ionic_pgtbl_unbuf(dev, &buf); ionic_destroy_cq_common(dev, &vcq->cq[udma_idx]); -err_init: - ; + } + + return rc; +} + +int ionic_create_cq(struct ib_cq *ibcq, const struct ib_cq_init_attr *attr, + struct uverbs_attr_bundle *attrs) +{ + struct ionic_ibdev *dev = to_ionic_ibdev(ibcq->device); + struct ionic_vcq *vcq = to_ionic_vcq(ibcq); + struct ionic_tbl_buf buf = {}; + int udma_idx = 0, rc; + + vcq->udma_mask = BIT(dev->lif_cfg.udma_count) - 1; + for (; udma_idx < dev->lif_cfg.udma_count; ++udma_idx) { + rc = ionic_create_cq_common(vcq, &buf, attr, NULL, NULL, NULL, + NULL, udma_idx); + if (rc) + goto err_resp; + + rc = ionic_create_cq_cmd(dev, NULL, &vcq->cq[udma_idx], &buf); + if (rc) { + ionic_pgtbl_unbuf(dev, &buf); + ionic_destroy_cq_common(dev, &vcq->cq[udma_idx]); + goto err_resp; + } + + ionic_pgtbl_unbuf(dev, &buf); + } + + vcq->ibcq.cqe = attr->cqe; + + return 0; + +err_resp: + while (udma_idx--) { + ionic_destroy_cq_cmd(dev, vcq->cq[udma_idx].cqid); + ionic_pgtbl_unbuf(dev, &buf); + ionic_destroy_cq_common(dev, &vcq->cq[udma_idx]); } return rc; diff --git a/drivers/infiniband/hw/ionic/ionic_ibdev.c b/drivers/infiniband/hw/ionic/ionic_ibdev.c index 164046d00e5d..32321a8996d6 100644 --- a/drivers/infiniband/hw/ionic/ionic_ibdev.c +++ b/drivers/infiniband/hw/ionic/ionic_ibdev.c @@ -229,6 +229,7 @@ static const struct ib_device_ops ionic_dev_ops = { .alloc_mw = ionic_alloc_mw, .dealloc_mw = ionic_dealloc_mw, .create_cq = ionic_create_cq, + .create_user_cq = ionic_create_user_cq, .destroy_cq = ionic_destroy_cq, .create_qp = ionic_create_qp, .modify_qp = ionic_modify_qp, diff --git a/drivers/infiniband/hw/ionic/ionic_ibdev.h b/drivers/infiniband/hw/ionic/ionic_ibdev.h index 63828240d659..0bcb8be6fb62 100644 --- a/drivers/infiniband/hw/ionic/ionic_ibdev.h +++ b/drivers/infiniband/hw/ionic/ionic_ibdev.h @@ -482,6 +482,8 @@ int ionic_alloc_mw(struct ib_mw *ibmw, struct ib_udata *udata); int ionic_dealloc_mw(struct ib_mw *ibmw); int ionic_create_cq(struct ib_cq *ibcq, const struct ib_cq_init_attr *attr, struct uverbs_attr_bundle *attrs); +int ionic_create_user_cq(struct ib_cq *ibcq, const struct ib_cq_init_attr *attr, + struct uverbs_attr_bundle *attrs); int ionic_destroy_cq(struct ib_cq *ibcq, struct ib_udata *udata); int ionic_create_qp(struct ib_qp *ibqp, struct ib_qp_init_attr *attr, struct ib_udata *udata); -- 2.52.0