Re: [PATCH 0/2] PCI/P2PDMA: Allow P2PDMA in VMware and Hyper-V guests on Intel hosts

[Leon Romanovsky <leon@kernel.org>]

On Mon, Oct 12, 2026 at 04:45:08PM +0000, Popov, Pavel E wrote:
> > I'm not following your reasoning here. In the cover letter, you say that
> > VMware reviewed your work. If VMware wants to provide P2P support to its
> > users, it can add the necessary support itself. As for Microsoft, there's
> > no need to worry; it can handle the ACPI changes just fine.
> 
> The cover letter sentence on this, "their adoption timeline in
> hypervisors remains uncertain", was written with VMware's input; Jim,
> Radu and Alexey are on CC and can speak for ESXi. But whatever VMware
> and Microsoft do in future releases, guests on already shipped ESXi and
> Hyper-V versions are not going to get HMAT, and those stay in production
> for years. On them, passthrough GPUs, NICs and NVMe drives have no P2PDMA
> at all without a kernel-side fallback.
> 
> > Of course not. P2P operation depends on the hypervisor topology, which
> > the proposed code does not account for.
> 
> The guest topology is what the code already evaluates, unchanged: the
> common upstream bridge walk and the ACS checks run first, and the new
> check is reached only after they fail, right where cpu_supports_p2pdma()
> already bypasses the host bridge lookup for AMD Zen. What the guest sees
> is a flat topology:
> 
> VMware, four GPUs:
> 
>   -+-[0000:00]-+-00.0  Intel 440BX/ZX/DX Host bridge
>    |           +-07.x  PIIX4 ISA/IDE/ACPI, VMCI, SVGA
>    +-[0000:02]-+-00.0  VMware PVSCSI
>    |           +-01.0  VMware VMXNET3
>    |           ...
>    \-[0000:03]-+-00.0  Intel GPU
>                +-01.0  Intel GPU
>                +-02.0  Intel GPU
>                \-03.0  Intel GPU
> 
> Hyper-V, four GPUs:
> 
>   -[2fc0:00]---00.0  Intel GPU
>   -[542b:00]---00.0  Intel GPU
>   -[5c71:00]---00.0  Intel GPU
>   -[9624:00]---00.0  Intel GPU
> 
> The passthrough devices sit directly on root buses with no host bridge
> device and no root ports; on Hyper-V each is alone in its own PCI
> domain. There is no upstream bridge to share, no ACS to evaluate, and
> the host bridge lookup lands on the endpoint itself. The topology
> carries no routing information, so the check falls back to the CPU model
> and hypervisor type. HMAT would provide what the topology cannot; when
> your HMAT-based detection lands it should be consulted first, so this
> check is never reached where HMAT exists.

Please read all of my responses. I was explicit about why the check inside
the guest VM produces random results. However, your responses continue
to focus on the guest, which is not the problem.

In the meantime, add:
Nacked-by: Leon Romanovsky <leon@kernel.org>

to any patches that do not fix the hypervisor first.

Thanks