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([2404:f801:9000:18:efec::75b]) by smtp.gmail.com with ESMTPSA id y2-20020a17090264c200b001bf3bdbceb5sm12795314pli.134.2023.08.24.07.44.25 (version=TLS1_3 cipher=TLS_AES_128_GCM_SHA256 bits=128/128); Thu, 24 Aug 2023 07:44:35 -0700 (PDT) Message-ID: <4ae6b858-da04-3f7f-dfd9-cd4c03716314@gmail.com> Date: Thu, 24 Aug 2023 22:44:23 +0800 MIME-Version: 1.0 User-Agent: Mozilla/5.0 (Windows NT 10.0; Win64; x64; rv:102.0) Gecko/20100101 Thunderbird/102.14.0 Subject: Re: [PATCH v3 08/10] x86/hyperv: Use TDX GHCI to access some MSRs in a TDX VM with the paravisor To: Dexuan Cui , ak@linux.intel.com, arnd@arndb.de, bp@alien8.de, brijesh.singh@amd.com, dan.j.williams@intel.com, dave.hansen@intel.com, dave.hansen@linux.intel.com, haiyangz@microsoft.com, hpa@zytor.com, jane.chu@oracle.com, kirill.shutemov@linux.intel.com, kys@microsoft.com, linux-hyperv@vger.kernel.org, luto@kernel.org, mingo@redhat.com, peterz@infradead.org, rostedt@goodmis.org, sathyanarayanan.kuppuswamy@linux.intel.com, seanjc@google.com, tglx@linutronix.de, tony.luck@intel.com, wei.liu@kernel.org, Jason@zx2c4.com, nik.borisov@suse.com, mikelley@microsoft.com Cc: x86@kernel.org, linux-kernel@vger.kernel.org, linux-arch@vger.kernel.org, Tianyu.Lan@microsoft.com, rick.p.edgecombe@intel.com, andavis@redhat.com, mheslin@redhat.com, vkuznets@redhat.com, xiaoyao.li@intel.com References: <20230824080712.30327-1-decui@microsoft.com> <20230824080712.30327-9-decui@microsoft.com> From: Tianyu Lan In-Reply-To: <20230824080712.30327-9-decui@microsoft.com> Content-Type: text/plain; charset=UTF-8; format=flowed Content-Transfer-Encoding: 7bit Precedence: bulk List-ID: X-Mailing-List: linux-hyperv@vger.kernel.org On 8/24/2023 4:07 PM, Dexuan Cui wrote: > When the paravisor is present, a SNP VM must use GHCB to access some > special MSRs, including HV_X64_MSR_GUEST_OS_ID and some SynIC MSRs. > > Similarly, when the paravisor is present, a TDX VM must use TDX GHCI > to access the same MSRs. > > Implement hv_tdx_msr_write() and hv_tdx_msr_read(), and use the helper > functions hv_ivm_msr_read() and hv_ivm_msr_write() to access the MSRs > in a unified way for SNP/TDX VMs with the paravisor. > > Do not export hv_tdx_msr_write() and hv_tdx_msr_read(), because we never > really used hv_ghcb_msr_write() and hv_ghcb_msr_read() in any module. > > Update arch/x86/include/asm/mshyperv.h so that the kernel can still build > if CONFIG_AMD_MEM_ENCRYPT or CONFIG_INTEL_TDX_GUEST is not set, or > neither is set. > > Signed-off-by: Dexuan Cui Reviewed-by: Tianyu Lan