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[91.219.240.2]) by smtp.gmail.com with ESMTPSA id d11-20020a5d4f8b000000b0020c7ec0fdf4sm15791108wru.117.2022.06.28.05.02.59 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Tue, 28 Jun 2022 05:02:59 -0700 (PDT) From: Vitaly Kuznetsov To: "Dong, Eddie" , "kvm@vger.kernel.org" , Paolo Bonzini , "Christopherson, Sean" Cc: Anirudh Rayabharam , Wanpeng Li , Jim Mattson , Maxim Levitsky , "linux-hyperv@vger.kernel.org" , "linux-kernel@vger.kernel.org" Subject: RE: [PATCH 04/14] KVM: VMX: Extend VMX controls macro shenanigans In-Reply-To: References: <20220627160440.31857-1-vkuznets@redhat.com> <20220627160440.31857-5-vkuznets@redhat.com> Date: Tue, 28 Jun 2022 14:02:59 +0200 Message-ID: <87edz9uhak.fsf@redhat.com> MIME-Version: 1.0 Content-Type: text/plain Precedence: bulk List-ID: X-Mailing-List: linux-hyperv@vger.kernel.org "Dong, Eddie" writes: >> -----Original Message----- >> From: Vitaly Kuznetsov >> Sent: Monday, June 27, 2022 9:05 AM >> To: kvm@vger.kernel.org; Paolo Bonzini ; >> Christopherson,, Sean >> Cc: Anirudh Rayabharam ; Wanpeng Li >> ; Jim Mattson ; Maxim >> Levitsky ; linux-hyperv@vger.kernel.org; linux- >> kernel@vger.kernel.org >> Subject: [PATCH 04/14] KVM: VMX: Extend VMX controls macro shenanigans >> >> When VMX controls macros are used to set or clear a control bit, make sure >> that this bit was checked in setup_vmcs_config() and thus is properly >> reflected in vmcs_config. >> ... > > With this, will it be safer if we present L1 CTRL MSRs with the bits > KVM really uses? Do I miss something? Sean has already answered but let me present my version. Currently, vmcs_config has sanitized VMX control MSRs values filtering out three groups of features: - Features, which KVM doesn't know about. - Features, which KVM can't enable (because of eVMCS, bugs,...) - Features, which KVM doesn't want to enable for some reason. L1 VMX control MSRs should have the first two groups filtered out but not the third. E.g. when EPT is in use, KVM doesn't use CPU_BASED_CR3_LOAD_EXITING/CPU_BASED_CR3_STORE_EXITING but this doesn't mean that all possible L1 hypervisors are going to be happy if we filter these out. Same goes to e.g. CPU_BASED_RDTSC_EXITING: KVM never sets this for itself but nested hypervisor can. -- Vitaly