From: Neeraj Upadhyay <Neeraj.Upadhyay@amd.com>
To: Tianyu Lan <ltykernel@gmail.com>,
kys@microsoft.com, haiyangz@microsoft.com, wei.liu@kernel.org,
decui@microsoft.com, tglx@linutronix.de, mingo@redhat.com,
bp@alien8.de, dave.hansen@linux.intel.com, x86@kernel.org,
hpa@zytor.com, arnd@arndb.de, kvijayab@amd.com
Cc: Tianyu Lan <tiala@microsoft.com>,
linux-arch@vger.kernel.org, linux-hyperv@vger.kernel.org,
linux-kernel@vger.kernel.org,
Michael Kelley <mhklinux@outlook.com>
Subject: Re: [RFC PATCH V5 2/4] Drivers: hv: Allow vmbus message synic interrupt injected from Hyper-V
Date: Tue, 5 Aug 2025 19:29:08 +0530 [thread overview]
Message-ID: <912536fc-15d4-4a57-91b5-ec902a93e2f4@amd.com> (raw)
In-Reply-To: <20250804180525.32658-3-ltykernel@gmail.com>
On 8/4/2025 11:35 PM, Tianyu Lan wrote:
> From: Tianyu Lan <tiala@microsoft.com>
>
...
> diff --git a/drivers/hv/hv.c b/drivers/hv/hv.c
> index 308c8f279df8..2ff433cb5cc2 100644
> --- a/drivers/hv/hv.c
> +++ b/drivers/hv/hv.c
> @@ -314,8 +314,11 @@ void hv_synic_enable_regs(unsigned int cpu)
> shared_sint.vector = vmbus_interrupt;
> shared_sint.masked = false;
> shared_sint.auto_eoi = hv_recommend_using_aeoi();
> +
Nit: extra newline.
> hv_set_msr(HV_MSR_SINT0 + VMBUS_MESSAGE_SINT, shared_sint.as_uint64);
>
> + hv_enable_coco_interrupt(cpu, vmbus_interrupt, true);
> +
> /* Enable the global synic bit */
> sctrl.as_uint64 = hv_get_msr(HV_MSR_SCONTROL);
> sctrl.enable = 1;
> @@ -342,7 +345,6 @@ void hv_synic_disable_regs(unsigned int cpu)
> union hv_synic_scontrol sctrl;
>
> shared_sint.as_uint64 = hv_get_msr(HV_MSR_SINT0 + VMBUS_MESSAGE_SINT);
> -
Nit: extra newline.
> shared_sint.masked = 1;
>
> /* Need to correctly cleanup in the case of SMP!!! */
> @@ -350,6 +352,9 @@ void hv_synic_disable_regs(unsigned int cpu)
> hv_set_msr(HV_MSR_SINT0 + VMBUS_MESSAGE_SINT, shared_sint.as_uint64);
>
> simp.as_uint64 = hv_get_msr(HV_MSR_SIMP);
> +
> + hv_enable_coco_interrupt(cpu, vmbus_interrupt, false);
> +
Nit: Maybe this should be above "simp.as_uint64 = hv_get_msr(HV_MSR_SIMP)" ?
Reviewed-by: Neeraj Upadhyay <Neeraj.Upadhyay@amd.com>
- Neeraj
next prev parent reply other threads:[~2025-08-05 13:59 UTC|newest]
Thread overview: 14+ messages / expand[flat|nested] mbox.gz Atom feed top
2025-08-04 18:05 [RFC PATCH V5 0/4] x86/Hyper-V: Add AMD Secure AVIC for Hyper-V platform Tianyu Lan
2025-08-04 18:05 ` [RFC PATCH V5 1/4] x86/hyperv: Don't use hv apic driver when Secure AVIC is available Tianyu Lan
2025-08-05 13:42 ` Neeraj Upadhyay
2025-08-04 18:05 ` [RFC PATCH V5 2/4] Drivers: hv: Allow vmbus message synic interrupt injected from Hyper-V Tianyu Lan
2025-08-05 13:59 ` Neeraj Upadhyay [this message]
2025-08-05 15:18 ` Tianyu Lan
2025-08-05 18:09 ` Michael Kelley
2025-08-05 19:24 ` Tianyu Lan
2025-08-04 18:05 ` [RFC PATCH V5 3/4] x86/hyperv: Don't use auto-eoi when Secure AVIC is available Tianyu Lan
2025-08-05 14:06 ` Neeraj Upadhyay
2025-08-04 18:05 ` [RFC PATCH V5 4/4] x86/hyperv: Allow Hyper-V to inject STIMER0 interrupts Tianyu Lan
2025-08-05 14:08 ` Neeraj Upadhyay
2025-08-06 5:42 ` [RFC PATCH V5 0/4] x86/Hyper-V: Add AMD Secure AVIC for Hyper-V platform Naman Jain
2025-08-06 9:20 ` Tianyu Lan
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