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From: Tianyu Lan <ltykernel@gmail.com>
To: Michael Kelley <mhklinux@outlook.com>
Cc: "kys@microsoft.com" <kys@microsoft.com>,
	"haiyangz@microsoft.com" <haiyangz@microsoft.com>,
	 "wei.liu@kernel.org" <wei.liu@kernel.org>,
	"decui@microsoft.com" <decui@microsoft.com>,
	 "tglx@linutronix.de" <tglx@linutronix.de>,
	"mingo@redhat.com" <mingo@redhat.com>,
	"bp@alien8.de" <bp@alien8.de>,
	 "dave.hansen@linux.intel.com" <dave.hansen@linux.intel.com>,
	"x86@kernel.org" <x86@kernel.org>,
	 "hpa@zytor.com" <hpa@zytor.com>, "arnd@arndb.de" <arnd@arndb.de>,
	 "Neeraj.Upadhyay@amd.com" <Neeraj.Upadhyay@amd.com>,
	Tianyu Lan <tiala@microsoft.com>,
	 "linux-arch@vger.kernel.org" <linux-arch@vger.kernel.org>,
	 "linux-hyperv@vger.kernel.org" <linux-hyperv@vger.kernel.org>,
	 "linux-kernel@vger.kernel.org" <linux-kernel@vger.kernel.org>
Subject: Re: [RFC PATCH V6 2/4 Resend] Drivers: hv: Allow vmbus message synic interrupt injected from Hyper-V
Date: Thu, 7 Aug 2025 00:04:45 +0800	[thread overview]
Message-ID: <CAMvTesAmCyO6XF-sRtMKw=TwKgeqaEkMQTmtkZbA7P-zeqDg6Q@mail.gmail.com> (raw)
In-Reply-To: <SN6PR02MB41577D7BFC7FA078880979A5D42DA@SN6PR02MB4157.namprd02.prod.outlook.com>

On Wed, Aug 6, 2025 at 10:11 PM Michael Kelley <mhklinux@outlook.com> wrote:
>
> From: Tianyu Lan <ltykernel@gmail.com> Sent: Wednesday, August 6, 2025 5:19 AM
> >
> > When Secure AVIC is enabled, VMBus driver should
> > call x2apic Secure AVIC interface to allow Hyper-V
> > to inject VMBus message interrupt.
> >
> > Reviewed-by: Neeraj Upadhyay <Neeraj.Upadhyay@amd.com>
> > Signed-off-by: Tianyu Lan <tiala@microsoft.com>
> > ---
> > Change since RFC V5:
> >        - Rmove extra line and move hv_enable_coco_interrupt()
> >          just after hv_set_msr() in the hv_synic_disable_regs().
> >
> > Change since RFC V4:
> >         - Change the order to call hv_enable_coco_interrupt()
> >         in the hv_synic_enable/disable_regs().
> >       - Update commit title "Drivers/hv:" to "Drivers: hv:"
> >
> > Change since RFC V3:
> >        - Disable VMBus Message interrupt via hv_enable_
> >                coco_interrupt() in the hv_synic_disable_regs().
> > ---
> >  arch/x86/hyperv/hv_apic.c      | 5 +++++
> >  drivers/hv/hv.c                | 7 ++++++-
> >  drivers/hv/hv_common.c         | 5 +++++
> >  include/asm-generic/mshyperv.h | 1 +
> >  4 files changed, 17 insertions(+), 1 deletion(-)
> >
> > diff --git a/arch/x86/hyperv/hv_apic.c b/arch/x86/hyperv/hv_apic.c
> > index 01bc02cc0590..c9808a51fa37 100644
> > --- a/arch/x86/hyperv/hv_apic.c
> > +++ b/arch/x86/hyperv/hv_apic.c
> > @@ -54,6 +54,11 @@ static void hv_apic_icr_write(u32 low, u32 id)
> >       wrmsrq(HV_X64_MSR_ICR, reg_val);
> >  }
> >
> > +void hv_enable_coco_interrupt(unsigned int cpu, unsigned int vector, bool set)
> > +{
> > +     apic_update_vector(cpu, vector, set);
> > +}
> > +
> >  static u32 hv_apic_read(u32 reg)
> >  {
> >       u32 reg_val, hi;
> > diff --git a/drivers/hv/hv.c b/drivers/hv/hv.c
> > index 308c8f279df8..d68a96de1626 100644
> > --- a/drivers/hv/hv.c
> > +++ b/drivers/hv/hv.c
> > @@ -312,10 +312,13 @@ void hv_synic_enable_regs(unsigned int cpu)
> >       shared_sint.as_uint64 = hv_get_msr(HV_MSR_SINT0 + VMBUS_MESSAGE_SINT);
> >
> >       shared_sint.vector = vmbus_interrupt;
> > +
>
> The spurious blank line is still here.
>
> >       shared_sint.masked = false;
> >       shared_sint.auto_eoi = hv_recommend_using_aeoi();
> >       hv_set_msr(HV_MSR_SINT0 + VMBUS_MESSAGE_SINT, shared_sint.as_uint64);
> >
> > +     hv_enable_coco_interrupt(cpu, vmbus_interrupt, true);
> > +
> >       /* Enable the global synic bit */
> >       sctrl.as_uint64 = hv_get_msr(HV_MSR_SCONTROL);
> >       sctrl.enable = 1;
> > @@ -342,7 +345,6 @@ void hv_synic_disable_regs(unsigned int cpu)
> >       union hv_synic_scontrol sctrl;
> >
> >       shared_sint.as_uint64 = hv_get_msr(HV_MSR_SINT0 + VMBUS_MESSAGE_SINT);
> > -
> >       shared_sint.masked = 1;
> >
> >       /* Need to correctly cleanup in the case of SMP!!! */
> > @@ -350,6 +352,9 @@ void hv_synic_disable_regs(unsigned int cpu)
> >       hv_set_msr(HV_MSR_SINT0 + VMBUS_MESSAGE_SINT, shared_sint.as_uint64);
> >
> >       simp.as_uint64 = hv_get_msr(HV_MSR_SIMP);
> > +
> > +     hv_enable_coco_interrupt(cpu, vmbus_interrupt, false);
> > +
>
> This line is still in the wrong place. Maybe you accidentally resent
> the previous version of the patch instead of the version with your
> intended changes?
>
> Michael
Hi Michael:
      I just sent out an update version. Sorry for confusion.
-- 
Thanks
Tianyu Lan

  parent reply	other threads:[~2025-08-06 16:05 UTC|newest]

Thread overview: 14+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2025-08-06 12:18 [RFC PATCH V6 0/4 Resend] x86/Hyper-V: Add AMD Secure AVIC for Hyper-V platform Tianyu Lan
2025-08-06 12:18 ` [RFC PATCH V6 1/4 Resend] x86/hyperv: Don't use hv apic driver when Secure AVIC is available Tianyu Lan
2025-08-06 12:18 ` [RFC PATCH V6 2/4 Resend] Drivers: hv: Allow vmbus message synic interrupt injected from Hyper-V Tianyu Lan
2025-08-06 14:11   ` Michael Kelley
2025-08-06 16:00     ` [Update RFC PATCH V6 2/4] " Tianyu Lan
2025-08-07  4:13       ` Michael Kelley
2025-08-06 16:04     ` Tianyu Lan [this message]
2025-08-06 12:18 ` [RFC PATCH V6 3/4 Resend] x86/hyperv: Don't use auto-eoi when Secure AVIC is available Tianyu Lan
2025-08-06 12:18 ` [RFC PATCH V6 4/4 Resend] x86/hyperv: Allow Hyper-V to inject STIMER0 interrupts Tianyu Lan
2025-08-12 23:47 ` [RFC PATCH V6 0/4 Resend] x86/Hyper-V: Add AMD Secure AVIC for Hyper-V platform Wei Liu
2025-08-13 11:44   ` Tianyu Lan
2025-08-13 14:40     ` Wei Liu
2025-08-13 15:06       ` Tianyu Lan
2025-08-13 12:08   ` Tianyu Lan

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