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* [PATCH 0/5] x86/Hyper-V: Add AMD Secure AVIC for Hyper-V platform
@ 2025-09-18 15:00 Tianyu Lan
  2025-09-18 15:00 ` [PATCH 1/5] x86/hyperv: Don't use hv apic driver when Secure AVIC is available Tianyu Lan
                   ` (5 more replies)
  0 siblings, 6 replies; 11+ messages in thread
From: Tianyu Lan @ 2025-09-18 15:00 UTC (permalink / raw)
  To: kys, haiyangz, wei.liu, decui, tglx, mingo, bp, dave.hansen, x86,
	hpa, arnd, Neeraj.Upadhyay, tiala, kvijayab, romank
  Cc: linux-arch, linux-hyperv

Secure AVIC is a new hardware feature in the AMD64
architecture to allow SEV-SNP guests to prevent the
hypervisor from generating unexpected interrupts to
a vCPU or otherwise violate architectural assumptions
around APIC behavior.

Each vCPU has a guest-allocated APIC backing page of
size 4K, which maintains APIC state for that vCPU.
APIC backing page's ALLOWED_IRR field indicates the
interrupt vectors which the guest allows the hypervisor
to send.

This patchset is to enable the feature for Hyper-V
platform. Patch "Drivers: hv: Allow vmbus message
synic interrupt injected from Hyper-V" is to expose
new fucntion hv_enable_coco_interrupt() and device
driver and arch code may update AVIC backing page
ALLOWED_IRR field to allow Hyper-V inject associated
vector.

The patchset is based on the tip tree commit 27a17e02418e
(x86/sev: Indicate the SEV-SNP guest supports Secure AVIC)

Tianyu Lan (5):
  x86/hyperv: Don't use hv apic driver when Secure AVIC is available
  drivers: hv: Allow vmbus message synic interrupt injected from Hyper-V
  x86/hyperv: Don't use auto-eoi when Secure AVIC is available
  x86/hyperv: Allow Hyper-V to inject STIMER0 interrupts
  x86/Hyper-V: Add Hyper-V specific hvcall to set backing page

 arch/x86/hyperv/hv_apic.c           |  8 ++++++
 arch/x86/hyperv/hv_init.c           | 31 ++++++++++++++++++++++-
 arch/x86/hyperv/ivm.c               | 38 ++++++++++++++++++++++++++++
 arch/x86/include/asm/mshyperv.h     |  2 ++
 arch/x86/kernel/apic/x2apic_savic.c |  9 ++++++-
 arch/x86/kernel/cpu/mshyperv.c      |  3 +++
 drivers/hv/hv.c                     |  2 ++
 drivers/hv/hv_common.c              |  5 ++++
 include/asm-generic/mshyperv.h      |  1 +
 include/hyperv/hvgdk_mini.h         | 39 +++++++++++++++++++++++++++++
 10 files changed, 136 insertions(+), 2 deletions(-)

-- 
2.25.1


^ permalink raw reply	[flat|nested] 11+ messages in thread

* [PATCH 1/5] x86/hyperv: Don't use hv apic driver when Secure AVIC is available
  2025-09-18 15:00 [PATCH 0/5] x86/Hyper-V: Add AMD Secure AVIC for Hyper-V platform Tianyu Lan
@ 2025-09-18 15:00 ` Tianyu Lan
  2025-09-18 15:00 ` [PATCH 2/5] drivers: hv: Allow vmbus message synic interrupt injected from Hyper-V Tianyu Lan
                   ` (4 subsequent siblings)
  5 siblings, 0 replies; 11+ messages in thread
From: Tianyu Lan @ 2025-09-18 15:00 UTC (permalink / raw)
  To: kys, haiyangz, wei.liu, decui, tglx, mingo, bp, dave.hansen, x86,
	hpa, arnd, Neeraj.Upadhyay, tiala, kvijayab, romank
  Cc: linux-arch, linux-hyperv, linux-kernel, Michael Kelley

When Secure AVIC is available, the AMD x2apic Secure
AVIC driver will be selected. In that case, have
hv_apic_init() return immediately without doing
anything.

Reviewed-by: Michael Kelley <mhklinux@outlook.com>
Reviewed-by: Neeraj Upadhyay <Neeraj.Upadhyay@amd.com>
Signed-off-by: Tianyu Lan <tiala@microsoft.com>
---
 arch/x86/hyperv/hv_apic.c | 3 +++
 1 file changed, 3 insertions(+)

diff --git a/arch/x86/hyperv/hv_apic.c b/arch/x86/hyperv/hv_apic.c
index bfde0a3498b9..e669053b637d 100644
--- a/arch/x86/hyperv/hv_apic.c
+++ b/arch/x86/hyperv/hv_apic.c
@@ -293,6 +293,9 @@ static void hv_send_ipi_self(int vector)
 
 void __init hv_apic_init(void)
 {
+	if (cc_platform_has(CC_ATTR_SNP_SECURE_AVIC))
+		return;
+
 	if (ms_hyperv.hints & HV_X64_CLUSTER_IPI_RECOMMENDED) {
 		pr_info("Hyper-V: Using IPI hypercalls\n");
 		/*
-- 
2.25.1


^ permalink raw reply related	[flat|nested] 11+ messages in thread

* [PATCH 2/5] drivers: hv: Allow vmbus message synic interrupt injected from Hyper-V
  2025-09-18 15:00 [PATCH 0/5] x86/Hyper-V: Add AMD Secure AVIC for Hyper-V platform Tianyu Lan
  2025-09-18 15:00 ` [PATCH 1/5] x86/hyperv: Don't use hv apic driver when Secure AVIC is available Tianyu Lan
@ 2025-09-18 15:00 ` Tianyu Lan
  2025-09-18 15:00 ` [PATCH 3/5] x86/hyperv: Don't use auto-eoi when Secure AVIC is available Tianyu Lan
                   ` (3 subsequent siblings)
  5 siblings, 0 replies; 11+ messages in thread
From: Tianyu Lan @ 2025-09-18 15:00 UTC (permalink / raw)
  To: kys, haiyangz, wei.liu, decui, tglx, mingo, bp, dave.hansen, x86,
	hpa, arnd, Neeraj.Upadhyay, tiala, kvijayab, romank
  Cc: linux-arch, linux-hyperv, linux-kernel, Michael Kelley

When Secure AVIC is enabled, VMBus driver should
call x2apic Secure AVIC interface to allow Hyper-V
to inject VMBus message interrupt.

Reviewed-by: Michael Kelley <mhklinux@outlook.com>
Reviewed-by: Neeraj Upadhyay <Neeraj.Upadhyay@amd.com>
Signed-off-by: Tianyu Lan <tiala@microsoft.com>
---
 arch/x86/hyperv/hv_apic.c      | 5 +++++
 drivers/hv/hv.c                | 2 ++
 drivers/hv/hv_common.c         | 5 +++++
 include/asm-generic/mshyperv.h | 1 +
 4 files changed, 13 insertions(+)

diff --git a/arch/x86/hyperv/hv_apic.c b/arch/x86/hyperv/hv_apic.c
index e669053b637d..a8de503def37 100644
--- a/arch/x86/hyperv/hv_apic.c
+++ b/arch/x86/hyperv/hv_apic.c
@@ -53,6 +53,11 @@ static void hv_apic_icr_write(u32 low, u32 id)
 	wrmsrq(HV_X64_MSR_ICR, reg_val);
 }
 
+void hv_enable_coco_interrupt(unsigned int cpu, unsigned int vector, bool set)
+{
+	apic_update_vector(cpu, vector, set);
+}
+
 static u32 hv_apic_read(u32 reg)
 {
 	u32 reg_val, hi;
diff --git a/drivers/hv/hv.c b/drivers/hv/hv.c
index b14c5f9e0ef2..ec5d10839e0f 100644
--- a/drivers/hv/hv.c
+++ b/drivers/hv/hv.c
@@ -307,6 +307,7 @@ void hv_synic_enable_regs(unsigned int cpu)
 	}
 
 	hv_set_msr(HV_MSR_SIEFP, siefp.as_uint64);
+	hv_enable_coco_interrupt(cpu, vmbus_interrupt, true);
 
 	/* Setup the shared SINT. */
 	if (vmbus_irq != -1)
@@ -350,6 +351,7 @@ void hv_synic_disable_regs(unsigned int cpu)
 	/* Need to correctly cleanup in the case of SMP!!! */
 	/* Disable the interrupt */
 	hv_set_msr(HV_MSR_SINT0 + VMBUS_MESSAGE_SINT, shared_sint.as_uint64);
+	hv_enable_coco_interrupt(cpu, vmbus_interrupt, false);
 
 	simp.as_uint64 = hv_get_msr(HV_MSR_SIMP);
 	/*
diff --git a/drivers/hv/hv_common.c b/drivers/hv/hv_common.c
index 49898d10faff..0f024ab3d360 100644
--- a/drivers/hv/hv_common.c
+++ b/drivers/hv/hv_common.c
@@ -716,6 +716,11 @@ u64 __weak hv_tdx_hypercall(u64 control, u64 param1, u64 param2)
 }
 EXPORT_SYMBOL_GPL(hv_tdx_hypercall);
 
+void __weak hv_enable_coco_interrupt(unsigned int cpu, unsigned int vector, bool set)
+{
+}
+EXPORT_SYMBOL_GPL(hv_enable_coco_interrupt);
+
 void hv_identify_partition_type(void)
 {
 	/* Assume guest role */
diff --git a/include/asm-generic/mshyperv.h b/include/asm-generic/mshyperv.h
index a729b77983fa..7907c9878369 100644
--- a/include/asm-generic/mshyperv.h
+++ b/include/asm-generic/mshyperv.h
@@ -333,6 +333,7 @@ bool hv_is_isolation_supported(void);
 bool hv_isolation_type_snp(void);
 u64 hv_ghcb_hypercall(u64 control, void *input, void *output, u32 input_size);
 u64 hv_tdx_hypercall(u64 control, u64 param1, u64 param2);
+void hv_enable_coco_interrupt(unsigned int cpu, unsigned int vector, bool set);
 void hyperv_cleanup(void);
 bool hv_query_ext_cap(u64 cap_query);
 void hv_setup_dma_ops(struct device *dev, bool coherent);
-- 
2.25.1


^ permalink raw reply related	[flat|nested] 11+ messages in thread

* [PATCH 3/5] x86/hyperv: Don't use auto-eoi when Secure AVIC is available
  2025-09-18 15:00 [PATCH 0/5] x86/Hyper-V: Add AMD Secure AVIC for Hyper-V platform Tianyu Lan
  2025-09-18 15:00 ` [PATCH 1/5] x86/hyperv: Don't use hv apic driver when Secure AVIC is available Tianyu Lan
  2025-09-18 15:00 ` [PATCH 2/5] drivers: hv: Allow vmbus message synic interrupt injected from Hyper-V Tianyu Lan
@ 2025-09-18 15:00 ` Tianyu Lan
  2025-09-18 15:00 ` [PATCH 4/5] x86/hyperv: Allow Hyper-V to inject STIMER0 interrupts Tianyu Lan
                   ` (2 subsequent siblings)
  5 siblings, 0 replies; 11+ messages in thread
From: Tianyu Lan @ 2025-09-18 15:00 UTC (permalink / raw)
  To: kys, haiyangz, wei.liu, decui, tglx, mingo, bp, dave.hansen, x86,
	hpa, arnd, Neeraj.Upadhyay, tiala, kvijayab, romank
  Cc: linux-arch, linux-hyperv, linux-kernel, Michael Kelley

Hyper-V doesn't support auto-eoi with Secure AVIC.
So set the HV_DEPRECATING_AEOI_RECOMMENDED flag
to force writing the EOI register after handling an interrupt.

Reviewed-by: Michael Kelley <mhklinux@outlook.com>
Reviewed-by: Neeraj Upadhyay <Neeraj.Upadhyay@amd.com>
Signed-off-by: Tianyu Lan <tiala@microsoft.com>
---
 arch/x86/kernel/cpu/mshyperv.c | 3 +++
 1 file changed, 3 insertions(+)

diff --git a/arch/x86/kernel/cpu/mshyperv.c b/arch/x86/kernel/cpu/mshyperv.c
index c78f860419d6..6dd3ae66a646 100644
--- a/arch/x86/kernel/cpu/mshyperv.c
+++ b/arch/x86/kernel/cpu/mshyperv.c
@@ -464,6 +464,9 @@ static void __init ms_hyperv_init_platform(void)
 
 	hv_identify_partition_type();
 
+	if (cc_platform_has(CC_ATTR_SNP_SECURE_AVIC))
+		ms_hyperv.hints |= HV_DEPRECATING_AEOI_RECOMMENDED;
+
 	if (ms_hyperv.hints & HV_X64_HYPERV_NESTED) {
 		hv_nested = true;
 		pr_info("Hyper-V: running on a nested hypervisor\n");
-- 
2.25.1


^ permalink raw reply related	[flat|nested] 11+ messages in thread

* [PATCH 4/5] x86/hyperv: Allow Hyper-V to inject STIMER0 interrupts
  2025-09-18 15:00 [PATCH 0/5] x86/Hyper-V: Add AMD Secure AVIC for Hyper-V platform Tianyu Lan
                   ` (2 preceding siblings ...)
  2025-09-18 15:00 ` [PATCH 3/5] x86/hyperv: Don't use auto-eoi when Secure AVIC is available Tianyu Lan
@ 2025-09-18 15:00 ` Tianyu Lan
  2025-09-18 15:00 ` [PATCH 5/5] x86/Hyper-V: Add Hyper-V specific hvcall to set backing page Tianyu Lan
  2025-09-30 23:05 ` [PATCH 0/5] x86/Hyper-V: Add AMD Secure AVIC for Hyper-V platform Wei Liu
  5 siblings, 0 replies; 11+ messages in thread
From: Tianyu Lan @ 2025-09-18 15:00 UTC (permalink / raw)
  To: kys, haiyangz, wei.liu, decui, tglx, mingo, bp, dave.hansen, x86,
	hpa, arnd, Neeraj.Upadhyay, tiala, kvijayab, romank
  Cc: linux-arch, linux-hyperv, linux-kernel, Michael Kelley

When Secure AVIC is enabled, call Secure AVIC
function to allow Hyper-V to inject STIMER0 interrupt.

Reviewed-by: Neeraj Upadhyay <Neeraj.Upadhyay@amd.com>
Reviewed-by: Michael Kelley <mhklinux@outlook.com>
Signed-off-by: Tianyu Lan <tiala@microsoft.com>
---
 arch/x86/hyperv/hv_init.c | 7 +++++++
 1 file changed, 7 insertions(+)

diff --git a/arch/x86/hyperv/hv_init.c b/arch/x86/hyperv/hv_init.c
index afdbda2dd7b7..a38bb96c9f5e 100644
--- a/arch/x86/hyperv/hv_init.c
+++ b/arch/x86/hyperv/hv_init.c
@@ -133,6 +133,10 @@ static int hv_cpu_init(unsigned int cpu)
 		wrmsrq(HV_X64_MSR_VP_ASSIST_PAGE, msr.as_uint64);
 	}
 
+	/* Allow Hyper-V stimer vector to be injected from Hypervisor. */
+	if (ms_hyperv.misc_features & HV_STIMER_DIRECT_MODE_AVAILABLE)
+		apic_update_vector(cpu, HYPERV_STIMER0_VECTOR, true);
+
 	return hyperv_init_ghcb();
 }
 
@@ -240,6 +244,9 @@ static int hv_cpu_die(unsigned int cpu)
 		*ghcb_va = NULL;
 	}
 
+	if (ms_hyperv.misc_features & HV_STIMER_DIRECT_MODE_AVAILABLE)
+		apic_update_vector(cpu, HYPERV_STIMER0_VECTOR, false);
+
 	hv_common_cpu_die(cpu);
 
 	if (hv_vp_assist_page && hv_vp_assist_page[cpu]) {
-- 
2.25.1


^ permalink raw reply related	[flat|nested] 11+ messages in thread

* [PATCH 5/5] x86/Hyper-V: Add Hyper-V specific hvcall to set backing page
  2025-09-18 15:00 [PATCH 0/5] x86/Hyper-V: Add AMD Secure AVIC for Hyper-V platform Tianyu Lan
                   ` (3 preceding siblings ...)
  2025-09-18 15:00 ` [PATCH 4/5] x86/hyperv: Allow Hyper-V to inject STIMER0 interrupts Tianyu Lan
@ 2025-09-18 15:00 ` Tianyu Lan
  2025-09-18 15:09   ` Borislav Petkov
  2025-09-30 23:05 ` [PATCH 0/5] x86/Hyper-V: Add AMD Secure AVIC for Hyper-V platform Wei Liu
  5 siblings, 1 reply; 11+ messages in thread
From: Tianyu Lan @ 2025-09-18 15:00 UTC (permalink / raw)
  To: kys, haiyangz, wei.liu, decui, tglx, mingo, bp, dave.hansen, x86,
	hpa, arnd, Neeraj.Upadhyay, tiala, kvijayab, romank
  Cc: linux-arch, linux-hyperv, linux-kernel

Secure AVIC hardware provides APIC backing page
to aid the guest in limiting which interrupt
vectors can be injected into the guest. Hyper-V
introduces a new register HV_X64_REGISTER_SEV_GPA_PAGE
to notify hypervisor with APIC backing page and call
it in Secure AVIC driver.

Setting APIC backing page for APs takes place before
allocating hyperv_pcpu_input_arg and so allocate
hv_vp_early_input_arg to handle such case.

Signed-off-by: Roman Kisel <romank@linux.microsoft.com>
Signed-off-by: Tianyu Lan <tiala@microsoft.com>
---
 arch/x86/hyperv/hv_init.c           | 24 +++++++++++++++++-
 arch/x86/hyperv/ivm.c               | 38 ++++++++++++++++++++++++++++
 arch/x86/include/asm/mshyperv.h     |  2 ++
 arch/x86/kernel/apic/x2apic_savic.c |  9 ++++++-
 include/hyperv/hvgdk_mini.h         | 39 +++++++++++++++++++++++++++++
 5 files changed, 110 insertions(+), 2 deletions(-)

diff --git a/arch/x86/hyperv/hv_init.c b/arch/x86/hyperv/hv_init.c
index a38bb96c9f5e..3fa8e91cd03f 100644
--- a/arch/x86/hyperv/hv_init.c
+++ b/arch/x86/hyperv/hv_init.c
@@ -39,6 +39,7 @@
 void *hv_hypercall_pg;
 EXPORT_SYMBOL_GPL(hv_hypercall_pg);
 
+void *hv_vp_early_input_arg;
 union hv_ghcb * __percpu *hv_ghcb_pg;
 
 /* Storage to save the hypercall page temporarily for hibernation */
@@ -412,6 +413,7 @@ void __init hyperv_init(void)
 	u64 guest_id;
 	union hv_x64_msr_hypercall_contents hypercall_msr;
 	int cpuhp;
+	int ret;
 
 	if (x86_hyper_type != X86_HYPER_MS_HYPERV)
 		return;
@@ -419,6 +421,22 @@ void __init hyperv_init(void)
 	if (hv_common_init())
 		return;
 
+	if (cc_platform_has(CC_ATTR_SNP_SECURE_AVIC)) {
+		hv_vp_early_input_arg = kcalloc(num_possible_cpus(),
+					     PAGE_SIZE,
+					     GFP_KERNEL);
+		if (hv_vp_early_input_arg) {
+			ret = set_memory_decrypted((u64)hv_vp_early_input_arg,
+					     num_possible_cpus());
+			if (ret) {
+				kfree(hv_vp_early_input_arg);
+				goto common_free;
+			}
+		} else {
+			goto common_free;
+		}
+	}
+
 	/*
 	 * The VP assist page is useless to a TDX guest: the only use we
 	 * would have for it is lazy EOI, which can not be used with TDX.
@@ -433,7 +451,7 @@ void __init hyperv_init(void)
 		ms_hyperv.hints &= ~HV_X64_ENLIGHTENED_VMCS_RECOMMENDED;
 
 		if (!hv_isolation_type_tdx())
-			goto common_free;
+			goto free_vp_early_input_arg;
 	}
 
 	if (ms_hyperv.paravisor_present && hv_isolation_type_snp()) {
@@ -591,6 +609,10 @@ void __init hyperv_init(void)
 free_vp_assist_page:
 	kfree(hv_vp_assist_page);
 	hv_vp_assist_page = NULL;
+free_vp_early_input_arg:
+	set_memory_encrypted((u64)hv_vp_early_input_arg, num_possible_cpus());
+	kfree(hv_vp_early_input_arg);
+	hv_vp_early_input_arg = NULL;
 common_free:
 	hv_common_free();
 }
diff --git a/arch/x86/hyperv/ivm.c b/arch/x86/hyperv/ivm.c
index ade6c665c97e..e69dae57730c 100644
--- a/arch/x86/hyperv/ivm.c
+++ b/arch/x86/hyperv/ivm.c
@@ -291,6 +291,44 @@ static void snp_cleanup_vmsa(struct sev_es_save_area *vmsa)
 		free_page((unsigned long)vmsa);
 }
 
+enum es_result hv_set_savic_backing_page(u64 gfn)
+{
+	u64 control = HV_HYPERCALL_REP_COMP_1 | HVCALL_SET_VP_REGISTERS;
+	struct hv_set_vp_registers_input *input
+		= hv_vp_early_input_arg + smp_processor_id() * PAGE_SIZE;
+	union hv_x64_register_sev_gpa_page value;
+	unsigned long flags;
+	int retry = 5;
+	u64 ret;
+
+	local_irq_save(flags);
+
+	value.enabled = 1;
+	value.reserved = 0;
+	value.pagenumber = gfn;
+
+	memset(input, 0, struct_size(input, element, 1));
+	input->header.partitionid = HV_PARTITION_ID_SELF;
+	input->header.vpindex = HV_VP_INDEX_SELF;
+	input->header.inputvtl = ms_hyperv.vtl;
+	input->element[0].name = HV_X64_REGISTER_SEV_AVIC_GPA;
+	input->element[0].value.reg64 = value.u64;
+
+	do {
+		ret = hv_do_hypercall(control, input, NULL);
+	} while (ret == HV_STATUS_TIME_OUT && retry--);
+
+	if (!hv_result_success(ret))
+		pr_err("Failed to set Secure AVIC backing page %llx.\n", ret);
+
+	local_irq_restore(flags);
+
+	if (hv_result_success(ret))
+		return ES_OK;
+	else
+		return ES_VMM_ERROR;
+}
+
 int hv_snp_boot_ap(u32 apic_id, unsigned long start_ip, unsigned int cpu)
 {
 	struct sev_es_save_area *vmsa = (struct sev_es_save_area *)
diff --git a/arch/x86/include/asm/mshyperv.h b/arch/x86/include/asm/mshyperv.h
index abc4659f5809..b140558816de 100644
--- a/arch/x86/include/asm/mshyperv.h
+++ b/arch/x86/include/asm/mshyperv.h
@@ -43,6 +43,7 @@ static inline unsigned char hv_get_nmi_reason(void)
 extern bool hyperv_paravisor_present;
 
 extern void *hv_hypercall_pg;
+extern void *hv_vp_early_input_arg;
 
 extern union hv_ghcb * __percpu *hv_ghcb_pg;
 
@@ -252,6 +253,7 @@ int hv_unmap_ioapic_interrupt(int ioapic_id, struct hv_interrupt_entry *entry);
 bool hv_ghcb_negotiate_protocol(void);
 void __noreturn hv_ghcb_terminate(unsigned int set, unsigned int reason);
 int hv_snp_boot_ap(u32 apic_id, unsigned long start_ip, unsigned int cpu);
+enum es_result hv_set_savic_backing_page(u64 gfn);
 #else
 static inline bool hv_ghcb_negotiate_protocol(void) { return false; }
 static inline void hv_ghcb_terminate(unsigned int set, unsigned int reason) {}
diff --git a/arch/x86/kernel/apic/x2apic_savic.c b/arch/x86/kernel/apic/x2apic_savic.c
index dbc5678bc3b6..60bdb524de53 100644
--- a/arch/x86/kernel/apic/x2apic_savic.c
+++ b/arch/x86/kernel/apic/x2apic_savic.c
@@ -14,6 +14,7 @@
 
 #include <asm/apic.h>
 #include <asm/sev.h>
+#include <asm/mshyperv.h>
 
 #include "local.h"
 
@@ -342,6 +343,7 @@ static void savic_setup(void)
 	void *ap = this_cpu_ptr(savic_page);
 	enum es_result res;
 	unsigned long gpa;
+	unsigned long gfn;
 
 	/*
 	 * Before Secure AVIC is enabled, APIC MSR reads are intercepted.
@@ -350,6 +352,7 @@ static void savic_setup(void)
 	apic_set_reg(ap, APIC_ID, native_apic_msr_read(APIC_ID));
 
 	gpa = __pa(ap);
+	gfn = gpa >> PAGE_SHIFT;
 
 	/*
 	 * The NPT entry for a vCPU's APIC backing page must always be
@@ -361,7 +364,11 @@ static void savic_setup(void)
 	 * VMRUN, the hypervisor makes use of this information to make sure
 	 * the APIC backing page is mapped in NPT.
 	 */
-	res = savic_register_gpa(gpa);
+	if (hv_isolation_type_snp())
+		res = hv_set_savic_backing_page(gfn);
+	else
+		res = savic_register_gpa(gpa);
+
 	if (res != ES_OK)
 		sev_es_terminate(SEV_TERM_SET_LINUX, GHCB_TERM_SAVIC_FAIL);
 
diff --git a/include/hyperv/hvgdk_mini.h b/include/hyperv/hvgdk_mini.h
index 1be7f6a02304..e3092469aafe 100644
--- a/include/hyperv/hvgdk_mini.h
+++ b/include/hyperv/hvgdk_mini.h
@@ -1170,6 +1170,28 @@ union hv_register_value {
 	union hv_arm64_pending_synthetic_exception_event pending_synthetic_exception_event;
 };
 
+/* HvSetVpRegisters hypercall with variable size reg name/value list*/
+struct hv_set_vp_registers_input {
+	struct {
+		u64 partitionid;
+		u32 vpindex;
+		u8  inputvtl;
+		u8  padding[3];
+	} header;
+	struct {
+		u32 name;
+		u32 padding1;
+		u64 padding2;
+		union {
+			union hv_register_value value;
+			struct {
+				u64 valuelow;
+				u64 valuehigh;
+			};
+		};
+	} element[];
+} __packed;
+
 /* NOTE: Linux helper struct - NOT from Hyper-V code. */
 struct hv_output_get_vp_registers {
 	DECLARE_FLEX_ARRAY(union hv_register_value, values);
@@ -1210,6 +1232,15 @@ struct hv_input_get_vp_registers {
 	u32 names[];
 } __packed;
 
+union hv_x64_register_sev_gpa_page {
+	u64 u64;
+	struct {
+		u64 enabled:1;
+		u64 reserved:11;
+		u64 pagenumber:52;
+	};
+} __packed;
+
 struct hv_input_set_vp_registers {
 	u64 partition_id;
 	u32 vp_index;
@@ -1230,6 +1261,14 @@ struct hv_send_ipi {	 /* HV_INPUT_SEND_SYNTHETIC_CLUSTER_IPI */
 
 #define	HV_VTL_MASK			GENMASK(3, 0)
 
+/*
+ * Registers are only accessible via HVCALL_GET_VP_REGISTERS hvcall and
+ * there is not associated MSR address.
+ */
+#define	HV_X64_REGISTER_VSM_VP_STATUS	0x000D0003
+#define	HV_X64_VTL_MASK			GENMASK(3, 0)
+#define	HV_X64_REGISTER_SEV_AVIC_GPA    0x00090043
+
 /* Hyper-V memory host visibility */
 enum hv_mem_host_visibility {
 	VMBUS_PAGE_NOT_VISIBLE		= 0,
-- 
2.25.1


^ permalink raw reply related	[flat|nested] 11+ messages in thread

* Re: [PATCH 5/5] x86/Hyper-V: Add Hyper-V specific hvcall to set backing page
  2025-09-18 15:00 ` [PATCH 5/5] x86/Hyper-V: Add Hyper-V specific hvcall to set backing page Tianyu Lan
@ 2025-09-18 15:09   ` Borislav Petkov
  2025-09-18 17:11     ` Tianyu Lan
  0 siblings, 1 reply; 11+ messages in thread
From: Borislav Petkov @ 2025-09-18 15:09 UTC (permalink / raw)
  To: Tianyu Lan
  Cc: kys, haiyangz, wei.liu, decui, tglx, mingo, dave.hansen, x86, hpa,
	arnd, Neeraj.Upadhyay, tiala, kvijayab, romank, linux-arch,
	linux-hyperv, linux-kernel

On Thu, Sep 18, 2025 at 11:00:23AM -0400, Tianyu Lan wrote:
> Secure AVIC hardware provides APIC backing page
> to aid the guest in limiting which interrupt
> vectors can be injected into the guest. Hyper-V
> introduces a new register HV_X64_REGISTER_SEV_GPA_PAGE
> to notify hypervisor with APIC backing page and call
> it in Secure AVIC driver.

Why does hyperv needs special handling again and cannot simply adhere to the
secure AVIC spec?

None of that text explains *why* it is absolutely necessary to do something
hyperv-special...

> @@ -361,7 +364,11 @@ static void savic_setup(void)
>  	 * VMRUN, the hypervisor makes use of this information to make sure
>  	 * the APIC backing page is mapped in NPT.
>  	 */
> -	res = savic_register_gpa(gpa);
> +	if (hv_isolation_type_snp())
> +		res = hv_set_savic_backing_page(gfn);
> +	else
> +		res = savic_register_gpa(gpa);
> +

This is ugly and doesn't belong here.

-- 
Regards/Gruss,
    Boris.

https://people.kernel.org/tglx/notes-about-netiquette

^ permalink raw reply	[flat|nested] 11+ messages in thread

* Re: [PATCH 5/5] x86/Hyper-V: Add Hyper-V specific hvcall to set backing page
  2025-09-18 15:09   ` Borislav Petkov
@ 2025-09-18 17:11     ` Tianyu Lan
  2025-09-18 19:59       ` Borislav Petkov
  0 siblings, 1 reply; 11+ messages in thread
From: Tianyu Lan @ 2025-09-18 17:11 UTC (permalink / raw)
  To: Borislav Petkov
  Cc: kys, haiyangz, wei.liu, decui, tglx, mingo, dave.hansen, x86, hpa,
	arnd, Neeraj.Upadhyay, tiala, kvijayab, romank, linux-arch,
	linux-hyperv, linux-kernel, Michael Kelley

On Thu, Sep 18, 2025 at 11:10 PM Borislav Petkov <bp@alien8.de> wrote:
>
> On Thu, Sep 18, 2025 at 11:00:23AM -0400, Tianyu Lan wrote:
> > Secure AVIC hardware provides APIC backing page
> > to aid the guest in limiting which interrupt
> > vectors can be injected into the guest. Hyper-V
> > introduces a new register HV_X64_REGISTER_SEV_GPA_PAGE
> > to notify hypervisor with APIC backing page and call
> > it in Secure AVIC driver.
>
> Why does hyperv needs special handling again and cannot simply adhere to the
> secure AVIC spec?
>
> None of that text explains *why* it is absolutely necessary to do something
> hyperv-special...

Hyper-V uses a different hvcall to register an APIC backing page.

>
> > @@ -361,7 +364,11 @@ static void savic_setup(void)
> >        * VMRUN, the hypervisor makes use of this information to make sure
> >        * the APIC backing page is mapped in NPT.
> >        */
> > -     res = savic_register_gpa(gpa);
> > +     if (hv_isolation_type_snp())
> > +             res = hv_set_savic_backing_page(gfn);
> > +     else
> > +             res = savic_register_gpa(gpa);
> > +
>
> This is ugly and doesn't belong here.
>

Could I move the check into savic_register_gpa() or add a stub function
to check guest runs on Hyper-V  or not and then call associated function
to register APIC backing page?

--
Thanks

Tianyu Lan

^ permalink raw reply	[flat|nested] 11+ messages in thread

* Re: [PATCH 5/5] x86/Hyper-V: Add Hyper-V specific hvcall to set backing page
  2025-09-18 17:11     ` Tianyu Lan
@ 2025-09-18 19:59       ` Borislav Petkov
  0 siblings, 0 replies; 11+ messages in thread
From: Borislav Petkov @ 2025-09-18 19:59 UTC (permalink / raw)
  To: Tianyu Lan
  Cc: kys, haiyangz, wei.liu, decui, tglx, mingo, dave.hansen, x86, hpa,
	arnd, Neeraj.Upadhyay, tiala, romank, linux-arch, linux-hyperv,
	linux-kernel, Michael Kelley

On Fri, Sep 19, 2025 at 01:11:02AM +0800, Tianyu Lan wrote:
> Could I move the check into savic_register_gpa() or add a stub function
> to check guest runs on Hyper-V  or not and then call associated function
> to register APIC backing page?

You probably should do

static struct apic apic_x2apic_savic_hyperv

and copy the apic_x2apic_savic contents into it and overwrite the .setup
function with your variant.

-- 
Regards/Gruss,
    Boris.

https://people.kernel.org/tglx/notes-about-netiquette

^ permalink raw reply	[flat|nested] 11+ messages in thread

* Re: [PATCH 0/5] x86/Hyper-V: Add AMD Secure AVIC for Hyper-V platform
  2025-09-18 15:00 [PATCH 0/5] x86/Hyper-V: Add AMD Secure AVIC for Hyper-V platform Tianyu Lan
                   ` (4 preceding siblings ...)
  2025-09-18 15:00 ` [PATCH 5/5] x86/Hyper-V: Add Hyper-V specific hvcall to set backing page Tianyu Lan
@ 2025-09-30 23:05 ` Wei Liu
  2025-10-13 17:18   ` Wei Liu
  5 siblings, 1 reply; 11+ messages in thread
From: Wei Liu @ 2025-09-30 23:05 UTC (permalink / raw)
  To: Tianyu Lan
  Cc: kys, haiyangz, wei.liu, decui, tglx, mingo, bp, dave.hansen, x86,
	hpa, arnd, Neeraj.Upadhyay, tiala, kvijayab, romank, linux-arch,
	linux-hyperv

On Thu, Sep 18, 2025 at 11:00:18AM -0400, Tianyu Lan wrote:
> Secure AVIC is a new hardware feature in the AMD64
> architecture to allow SEV-SNP guests to prevent the
> hypervisor from generating unexpected interrupts to
> a vCPU or otherwise violate architectural assumptions
> around APIC behavior.
> 
> Each vCPU has a guest-allocated APIC backing page of
> size 4K, which maintains APIC state for that vCPU.
> APIC backing page's ALLOWED_IRR field indicates the
> interrupt vectors which the guest allows the hypervisor
> to send.
> 
> This patchset is to enable the feature for Hyper-V
> platform. Patch "Drivers: hv: Allow vmbus message
> synic interrupt injected from Hyper-V" is to expose
> new fucntion hv_enable_coco_interrupt() and device
> driver and arch code may update AVIC backing page
> ALLOWED_IRR field to allow Hyper-V inject associated
> vector.
> 
> The patchset is based on the tip tree commit 27a17e02418e
> (x86/sev: Indicate the SEV-SNP guest supports Secure AVIC)
> 
> Tianyu Lan (5):
>   x86/hyperv: Don't use hv apic driver when Secure AVIC is available
>   drivers: hv: Allow vmbus message synic interrupt injected from Hyper-V
>   x86/hyperv: Don't use auto-eoi when Secure AVIC is available
>   x86/hyperv: Allow Hyper-V to inject STIMER0 interrupts

These look good to me.

>   x86/Hyper-V: Add Hyper-V specific hvcall to set backing page

Please address Borislav's comment on this patch.

Thanks,
Wei

> 
>  arch/x86/hyperv/hv_apic.c           |  8 ++++++
>  arch/x86/hyperv/hv_init.c           | 31 ++++++++++++++++++++++-
>  arch/x86/hyperv/ivm.c               | 38 ++++++++++++++++++++++++++++
>  arch/x86/include/asm/mshyperv.h     |  2 ++
>  arch/x86/kernel/apic/x2apic_savic.c |  9 ++++++-
>  arch/x86/kernel/cpu/mshyperv.c      |  3 +++
>  drivers/hv/hv.c                     |  2 ++
>  drivers/hv/hv_common.c              |  5 ++++
>  include/asm-generic/mshyperv.h      |  1 +
>  include/hyperv/hvgdk_mini.h         | 39 +++++++++++++++++++++++++++++
>  10 files changed, 136 insertions(+), 2 deletions(-)
> 
> -- 
> 2.25.1
> 
> 

^ permalink raw reply	[flat|nested] 11+ messages in thread

* Re: [PATCH 0/5] x86/Hyper-V: Add AMD Secure AVIC for Hyper-V platform
  2025-09-30 23:05 ` [PATCH 0/5] x86/Hyper-V: Add AMD Secure AVIC for Hyper-V platform Wei Liu
@ 2025-10-13 17:18   ` Wei Liu
  0 siblings, 0 replies; 11+ messages in thread
From: Wei Liu @ 2025-10-13 17:18 UTC (permalink / raw)
  To: Tianyu Lan
  Cc: kys, haiyangz, wei.liu, decui, tglx, mingo, bp, dave.hansen, x86,
	hpa, arnd, Neeraj.Upadhyay, tiala, kvijayab, romank, linux-arch,
	linux-hyperv

On Tue, Sep 30, 2025 at 11:05:34PM +0000, Wei Liu wrote:
> On Thu, Sep 18, 2025 at 11:00:18AM -0400, Tianyu Lan wrote:
> > Secure AVIC is a new hardware feature in the AMD64
> > architecture to allow SEV-SNP guests to prevent the
> > hypervisor from generating unexpected interrupts to
> > a vCPU or otherwise violate architectural assumptions
> > around APIC behavior.
> > 
> > Each vCPU has a guest-allocated APIC backing page of
> > size 4K, which maintains APIC state for that vCPU.
> > APIC backing page's ALLOWED_IRR field indicates the
> > interrupt vectors which the guest allows the hypervisor
> > to send.
> > 
> > This patchset is to enable the feature for Hyper-V
> > platform. Patch "Drivers: hv: Allow vmbus message
> > synic interrupt injected from Hyper-V" is to expose
> > new fucntion hv_enable_coco_interrupt() and device
> > driver and arch code may update AVIC backing page
> > ALLOWED_IRR field to allow Hyper-V inject associated
> > vector.
> > 
> > The patchset is based on the tip tree commit 27a17e02418e
> > (x86/sev: Indicate the SEV-SNP guest supports Secure AVIC)
> > 
> > Tianyu Lan (5):
> >   x86/hyperv: Don't use hv apic driver when Secure AVIC is available
> >   drivers: hv: Allow vmbus message synic interrupt injected from Hyper-V
> >   x86/hyperv: Don't use auto-eoi when Secure AVIC is available
> >   x86/hyperv: Allow Hyper-V to inject STIMER0 interrupts
> 
> These look good to me.

I applied these four to hyperv-next.

> 
> >   x86/Hyper-V: Add Hyper-V specific hvcall to set backing page
> 
> Please address Borislav's comment on this patch.

This is no longer needed.

Thanks,
Wei

^ permalink raw reply	[flat|nested] 11+ messages in thread

end of thread, other threads:[~2025-10-13 17:18 UTC | newest]

Thread overview: 11+ messages (download: mbox.gz follow: Atom feed
-- links below jump to the message on this page --
2025-09-18 15:00 [PATCH 0/5] x86/Hyper-V: Add AMD Secure AVIC for Hyper-V platform Tianyu Lan
2025-09-18 15:00 ` [PATCH 1/5] x86/hyperv: Don't use hv apic driver when Secure AVIC is available Tianyu Lan
2025-09-18 15:00 ` [PATCH 2/5] drivers: hv: Allow vmbus message synic interrupt injected from Hyper-V Tianyu Lan
2025-09-18 15:00 ` [PATCH 3/5] x86/hyperv: Don't use auto-eoi when Secure AVIC is available Tianyu Lan
2025-09-18 15:00 ` [PATCH 4/5] x86/hyperv: Allow Hyper-V to inject STIMER0 interrupts Tianyu Lan
2025-09-18 15:00 ` [PATCH 5/5] x86/Hyper-V: Add Hyper-V specific hvcall to set backing page Tianyu Lan
2025-09-18 15:09   ` Borislav Petkov
2025-09-18 17:11     ` Tianyu Lan
2025-09-18 19:59       ` Borislav Petkov
2025-09-30 23:05 ` [PATCH 0/5] x86/Hyper-V: Add AMD Secure AVIC for Hyper-V platform Wei Liu
2025-10-13 17:18   ` Wei Liu

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