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Y. Srinivasan" , Haiyang Zhang , Wei Liu , Dexuan Cui , Long Li , Ajay Kaher , Alexey Makhalov , Jan Kiszka , Andy Lutomirski , Peter Zijlstra , Juergen Gross , Daniel Lezcano , John Stultz , "H. Peter Anvin" , Rick Edgecombe , Vitaly Kuznetsov , Broadcom internal kernel review list , Boris Ostrovsky , Stephen Boyd , kvm@vger.kernel.org, linux-kernel@vger.kernel.org, linux-coco@lists.linux.dev, linux-hyperv@vger.kernel.org, virtualization@lists.linux.dev, xen-devel@lists.xenproject.org, David Woodhouse , Tom Lendacky , Nikunj A Dadhania , David Woodhouse , Michael Kelley , Thomas Gleixner Subject: Re: [PATCH v4 07/47] x86/tdx: Force TSC frequency with CPUID-based info provided by the TDX-Module Message-ID: References: <20260529144435.704127-1-seanjc@google.com> <20260529144435.704127-8-seanjc@google.com> Precedence: bulk X-Mailing-List: linux-hyperv@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Type: text/plain; charset=utf-8 Content-Disposition: inline Content-Transfer-Encoding: 8bit In-Reply-To: <20260529144435.704127-8-seanjc@google.com> On Fri, May 29, 2026 at 07:43:54AM -0700, Sean Christopherson wrote: > When running as a TDX guest, explicitly set the TSC frequency to a known > value, using CPUID-based information, instead of potentially relying on a > hypervisor-controlled PV routine. For TDX guests, CPUID.0x15 is always > emulated by the TDX-Module, i.e. the information from CPUID is more > trustworthy than the information provided by the hypervisor. Right. EBX is configurable by TD_PARAMS.TSC_FREQUENCY at TD build. The rest is fixed. > To maintain backwards compatibility with TDX guest kernels that use native > calibration, and because it's the least awful option, retain > native_calibrate_tsc()'s stuffing of the local APIC bus period using the > core crystal frequency. While it's entirely possible for the hypervisor > to emulate the APIC timer at a different frequency than the core crystal > frequency, the commonly accepted interpretation of Intel's SDM is that APIC > timer runs at the core crystal frequency when that latter is enumerated via > CPUID: > > The APIC timer frequency will be the processor’s bus clock or core > crystal clock frequency (when TSC/core crystal clock ratio is enumerated > in CPUID leaf 0x15). > > If the hypervisor is malicious and deliberately runs the APIC timer at the > wrong frequency, nothing would stop the hypervisor from modifying the > frequency at any time, i.e. attempting to manually calibrate the frequency > out of paranoia would be futile. Agreed. > Deliberately leave CPU frequency calibration as is, since the TDX-Module > doesn't provide any guarantees with respect to CPUID.0x16. It is fixed to zeros. Sounds like a guarantee to me :P > Signed-off-by: Sean Christopherson Looks sane to me. Including your reasoning about tsc_early_khz= in reply to Sashiko. Reviewed-by: Kiryl Shutsemau (Meta) -- Kiryl Shutsemau / Kirill A. Shutemov