From: "Sricharan" <sricharan@codeaurora.org>
To: 'Abhishek Sahu' <absahu@codeaurora.org>, agross@codeaurora.org
Cc: architt@codeaurora.org, linux-arm-msm@vger.kernel.org,
ntelkar@codeaurora.org, linux-kernel@vger.kernel.org,
andy.gross@linaro.org, linux-i2c@vger.kernel.org,
dmaengine@vger.kernel.org, linux-arm-kernel@lists.infradead.org,
wsa@the-dreams.de
Subject: RE: [PATCH 1/2] i2c: qup: Cleared the error bits in ISR
Date: Wed, 11 May 2016 21:27:40 +0530 [thread overview]
Message-ID: <000701d1ab9d$df9b3100$9ed19300$@codeaurora.org> (raw)
In-Reply-To: <1462797871-8595-2-git-send-email-absahu@codeaurora.org>
Hi,
> 1. Current QCOM I2C driver hangs when sending data to address 0x03-0x07
> in some scenarios. The QUP controller generates invalid write in this
case,
> since these addresses are reserved for different bus formats.
>
> 2. Also, the error handling is done by I2C QUP ISR in the case of DMA
mode.
> The state need to be RESET in case of any error for clearing the available
> data in FIFO, which otherwise leaves the BAM DMA controller in hang state.
>
> This patch fixes the above two issues by clearing the error bits from I2C
and
> QUP status in ISR in case of I2C error, QUP error and resets the QUP state
to
> clear the FIFO data.
>
> Signed-off-by: Abhishek Sahu <absahu@codeaurora.org>
> ---
> drivers/i2c/busses/i2c-qup.c | 14 ++++++++------
> 1 file changed, 8 insertions(+), 6 deletions(-)
>
> diff --git a/drivers/i2c/busses/i2c-qup.c b/drivers/i2c/busses/i2c-qup.c
index
> 23eaabb..8c2f1bc 100644
> --- a/drivers/i2c/busses/i2c-qup.c
> +++ b/drivers/i2c/busses/i2c-qup.c
> @@ -213,14 +213,16 @@ static irqreturn_t qup_i2c_interrupt(int irq, void
> *dev)
> bus_err &= I2C_STATUS_ERROR_MASK;
> qup_err &= QUP_STATUS_ERROR_FLAGS;
>
> - if (qup_err) {
> - /* Clear Error interrupt */
> + /* Clear the error bits in QUP_ERROR_FLAGS */
> + if (qup_err)
> writel(qup_err, qup->base + QUP_ERROR_FLAGS);
> - goto done;
> - }
>
> - if (bus_err) {
> - /* Clear Error interrupt */
> + /* Clear the error bits in QUP_I2C_STATUS */
> + if (bus_err)
> + writel(bus_err, qup->base + QUP_I2C_STATUS);
> +
> + /* Reset the QUP State in case of error */
> + if (qup_err || bus_err) {
> writel(QUP_RESET_STATE, qup->base + QUP_STATE);
> goto done;
> }
In qup_i2c_xfer and qup_i2c_xfer_v2 state is set to RESET at the end,
when
there is no error. So would it be fine if we do it there
unconditionally ?
Regards,
Sricharan
next prev parent reply other threads:[~2016-05-11 15:57 UTC|newest]
Thread overview: 18+ messages / expand[flat|nested] mbox.gz Atom feed top
2016-05-09 12:44 [PATCH 0/2] i2c: qup: Fixed the DMA transfer errors Abhishek Sahu
2016-05-09 12:44 ` [PATCH 1/2] i2c: qup: Cleared the error bits in ISR Abhishek Sahu
2016-05-11 15:57 ` Sricharan [this message]
2016-05-11 17:34 ` Abhishek Sahu
2016-05-12 2:28 ` Sricharan
2016-05-12 5:13 ` Andy Gross
2016-05-12 6:18 ` Abhishek Sahu
2016-05-12 17:58 ` Andy Gross
2016-05-12 19:32 ` Abhishek Sahu
2016-05-12 20:05 ` Andy Gross
2016-05-12 20:27 ` Abhishek Sahu
2016-06-18 16:32 ` Wolfram Sang
2016-06-20 12:48 ` Abhishek Sahu
2016-07-15 6:33 ` Wolfram Sang
2016-05-09 12:44 ` [PATCH 2/2] i2c: qup: Fixed the DMA segments length Abhishek Sahu
2016-05-11 16:18 ` Sricharan
2016-05-11 17:43 ` Abhishek Sahu
2016-07-15 6:38 ` Wolfram Sang
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