From: Dmitry Osipenko <digetx@gmail.com>
To: Sowjanya Komatineni <skomatineni@nvidia.com>,
thierry.reding@gmail.com, jonathanh@nvidia.com,
mkarthik@nvidia.com, smohammed@nvidia.com, talho@nvidia.com
Cc: linux-tegra@vger.kernel.org, linux-kernel@vger.kernel.org,
linux-i2c@vger.kernel.org
Subject: Re: [PATCH V15 3/6] i2c: tegra: fix maximum transfer size
Date: Fri, 8 Feb 2019 01:09:47 +0300 [thread overview]
Message-ID: <1202cc91-cacf-673e-c32b-b4d1c78b71f2@gmail.com> (raw)
In-Reply-To: <1549576040-15907-3-git-send-email-skomatineni@nvidia.com>
08.02.2019 0:47, Sowjanya Komatineni пишет:
> Tegra194 supports maximum 64K bytes transfer per packet.
> Tegra186 and prior supports maximum 4K bytes transfer per packet.
> This includes 12 bytes of packet header.
>
> This patch fixes max write length to account for packet header size
> for transfers.
The commit message isn't accurate. We are not actually fixing anything here, this patch is just a preparation for adding DMA support that require the packet-header size to be excluded from the overall TX size-quirk because the packet-header is the part of the DMA transfer.
Given how small this change is, it's probably not really worth to factor out it into a separate patch, let's just squash it to to the DMA-patch.
> Signed-off-by: Sowjanya Komatineni <skomatineni@nvidia.com>
> ---
> [V15] : This is new patch in this series.
>
> drivers/i2c/busses/i2c-tegra.c | 7 ++++++-
> 1 file changed, 6 insertions(+), 1 deletion(-)
>
> diff --git a/drivers/i2c/busses/i2c-tegra.c b/drivers/i2c/busses/i2c-tegra.c
> index 3758c7a2c781..ab474cc86e0a 100644
> --- a/drivers/i2c/busses/i2c-tegra.c
> +++ b/drivers/i2c/busses/i2c-tegra.c
> @@ -125,6 +125,9 @@
> #define I2C_MST_FIFO_STATUS_TX_MASK 0xff0000
> #define I2C_MST_FIFO_STATUS_TX_SHIFT 16
>
> +/* Packet header size in bytes */
> +#define I2C_PACKET_HEADER_SIZE 12
> +
> /*
> * msg_end_type: The bus control which need to be send at end of transfer.
> * @MSG_END_STOP: Send stop pulse at end of transfer.
> @@ -900,11 +903,13 @@ static const struct i2c_algorithm tegra_i2c_algo = {
> static const struct i2c_adapter_quirks tegra_i2c_quirks = {
> .flags = I2C_AQ_NO_ZERO_LEN,
> .max_read_len = 4096,
> - .max_write_len = 4096,
> + .max_write_len = 4096 - I2C_PACKET_HEADER_SIZE,
> };
>
> static const struct i2c_adapter_quirks tegra194_i2c_quirks = {
> .flags = I2C_AQ_NO_ZERO_LEN,
> + .max_read_len = 65535,
> + .max_write_len = 65535 - I2C_PACKET_HEADER_SIZE,
> };
This is wrong, 65535 = 64 * 1024 - 1.
Let's just use size-constants provided by kernel:
static const struct i2c_adapter_quirks tegra_i2c_quirks = {
.flags = I2C_AQ_NO_ZERO_LEN,
.max_read_len = SZ_4K,
.max_write_len = SZ_4K - I2C_PACKET_HEADER_SIZE,
};
static const struct i2c_adapter_quirks tegra194_i2c_quirks = {
.flags = I2C_AQ_NO_ZERO_LEN,
.max_read_len = SZ_64K,
.max_write_len = SZ_64K - I2C_PACKET_HEADER_SIZE,
};
I'll take a look at other patches later today, no need to send out new version right now.
next prev parent reply other threads:[~2019-02-07 22:09 UTC|newest]
Thread overview: 20+ messages / expand[flat|nested] mbox.gz Atom feed top
2019-02-07 21:47 [PATCH V15 1/6] i2c: tegra: sort all the include headers alphabetically Sowjanya Komatineni
2019-02-07 21:47 ` [PATCH V15 2/6] i2c: tegra: add bus clear Master Support Sowjanya Komatineni
2019-02-07 21:47 ` [PATCH V15 3/6] i2c: tegra: fix maximum transfer size Sowjanya Komatineni
2019-02-07 22:09 ` Dmitry Osipenko [this message]
2019-02-07 22:25 ` Dmitry Osipenko
2019-02-08 12:46 ` Dmitry Osipenko
2019-02-08 14:12 ` Peter Rosin
2019-02-08 14:32 ` Dmitry Osipenko
2019-02-08 15:25 ` Sowjanya Komatineni
2019-02-08 15:44 ` Dmitry Osipenko
2019-02-07 21:47 ` [PATCH V15 4/6] i2c: tegra: Add DMA support Sowjanya Komatineni
2019-02-08 12:47 ` Dmitry Osipenko
2019-02-08 15:49 ` Sowjanya Komatineni
2019-02-08 15:55 ` Sowjanya Komatineni
2019-02-08 15:58 ` Sowjanya Komatineni
2019-02-08 16:15 ` Dmitry Osipenko
2019-02-07 21:47 ` [PATCH V15 5/6] i2c: tegra: update transfer timeout Sowjanya Komatineni
2019-02-07 21:47 ` [PATCH V15 6/6] i2c: tegra: add i2c interface timing support Sowjanya Komatineni
2019-02-08 12:53 ` Dmitry Osipenko
2019-02-08 13:00 ` Dmitry Osipenko
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