[PATCH v2] i2c-omap: Double clear of ARDY status in IRQ handler

[PATCH v2] i2c-omap: Double clear of ARDY status in IRQ handler

[Keerthy]

From: Richard woodruff <r-woodruff2-l0cyMroinI0@public.gmane.org>

This errata occurs when the ARDY interrupt generation is enabled.
At the begining of every new transaction the ARDY interrupt is cleared.

On continuous i2c transactions where after clearing the ARDY bit from
I2C_STAT register (clearing the interrupt), the IRQ line is reasserted and the
I2C_STAT[ARDY] bit set again on 1. In fact, the ARDY status bit is not cleared
at the write access to I2C_STAT[ARDY] and only the IRQ line is deasserted and
then reasserted. This is not captured in the usual errata documents.

The workaround is to have a double clear of ARDY status in irq handler.

Signed-off-by: Richard woodruff <r-woodruff2-l0cyMroinI0@public.gmane.org>
Signed-off-by: Keerthy <j-keerthy-l0cyMroinI0@public.gmane.org>
---
 drivers/i2c/busses/i2c-omap.c |    6 +++++-
 1 files changed, 5 insertions(+), 1 deletions(-)

diff --git a/drivers/i2c/busses/i2c-omap.c b/drivers/i2c/busses/i2c-omap.c
index b605ff3..5b35cf4 100644
--- a/drivers/i2c/busses/i2c-omap.c
+++ b/drivers/i2c/busses/i2c-omap.c
@@ -847,11 +847,15 @@ complete:
 			dev_err(dev->dev, "Arbitration lost\n");
 			err |= OMAP_I2C_STAT_AL;
 		}
+		/* 
+		 * ProDB0017052: Clear ARDY bit twice
+		 */ 
 		if (stat & (OMAP_I2C_STAT_ARDY | OMAP_I2C_STAT_NACK |
 					OMAP_I2C_STAT_AL)) {
 			omap_i2c_ack_stat(dev, stat &
 				(OMAP_I2C_STAT_RRDY | OMAP_I2C_STAT_RDR |
-				OMAP_I2C_STAT_XRDY | OMAP_I2C_STAT_XDR));
+				OMAP_I2C_STAT_XRDY | OMAP_I2C_STAT_XDR |
+				OMAP_I2C_STAT_ARDY));
 			omap_i2c_complete_cmd(dev, err);
 			return IRQ_HANDLED;
 		}
-- 
1.7.0.4

Re: [PATCH v2] i2c-omap: Double clear of ARDY status in IRQ handler

[Tony Lindgren]

* Keerthy <j-keerthy@ti.com> [110215 20:53]:
> From: Richard woodruff <r-woodruff2@ti.com>
> 
> This errata occurs when the ARDY interrupt generation is enabled.
> At the begining of every new transaction the ARDY interrupt is cleared.
> 
> On continuous i2c transactions where after clearing the ARDY bit from
> I2C_STAT register (clearing the interrupt), the IRQ line is reasserted and the
> I2C_STAT[ARDY] bit set again on 1. In fact, the ARDY status bit is not cleared
> at the write access to I2C_STAT[ARDY] and only the IRQ line is deasserted and
> then reasserted. This is not captured in the usual errata documents.
> 
> The workaround is to have a double clear of ARDY status in irq handler.

I'll add this to omap-testing for few days and then if no issue Ben
can merge this.

Regards,

Tony
 
> Signed-off-by: Richard woodruff <r-woodruff2@ti.com>
> Signed-off-by: Keerthy <j-keerthy@ti.com>
> ---
>  drivers/i2c/busses/i2c-omap.c |    6 +++++-
>  1 files changed, 5 insertions(+), 1 deletions(-)
> 
> diff --git a/drivers/i2c/busses/i2c-omap.c b/drivers/i2c/busses/i2c-omap.c
> index b605ff3..5b35cf4 100644
> --- a/drivers/i2c/busses/i2c-omap.c
> +++ b/drivers/i2c/busses/i2c-omap.c
> @@ -847,11 +847,15 @@ complete:
>  			dev_err(dev->dev, "Arbitration lost\n");
>  			err |= OMAP_I2C_STAT_AL;
>  		}
> +		/* 
> +		 * ProDB0017052: Clear ARDY bit twice
> +		 */ 
>  		if (stat & (OMAP_I2C_STAT_ARDY | OMAP_I2C_STAT_NACK |
>  					OMAP_I2C_STAT_AL)) {
>  			omap_i2c_ack_stat(dev, stat &
>  				(OMAP_I2C_STAT_RRDY | OMAP_I2C_STAT_RDR |
> -				OMAP_I2C_STAT_XRDY | OMAP_I2C_STAT_XDR));
> +				OMAP_I2C_STAT_XRDY | OMAP_I2C_STAT_XDR |
> +				OMAP_I2C_STAT_ARDY));
>  			omap_i2c_complete_cmd(dev, err);
>  			return IRQ_HANDLED;
>  		}
> -- 
> 1.7.0.4
> 
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Re: [PATCH v2] i2c-omap: Double clear of ARDY status in IRQ handler

[J, KEERTHY]

On Fri, Feb 18, 2011 at 5:38 AM, Tony Lindgren <tony-4v6yS6AI5VpBDgjK7y7TUQ@public.gmane.org> wrote:
> * Keerthy <j-keerthy-l0cyMroinI0@public.gmane.org> [110215 20:53]:
>> From: Richard woodruff <r-woodruff2-l0cyMroinI0@public.gmane.org>
>>
>> This errata occurs when the ARDY interrupt generation is enabled.
>> At the begining of every new transaction the ARDY interrupt is cleared.
>>
>> On continuous i2c transactions where after clearing the ARDY bit from
>> I2C_STAT register (clearing the interrupt), the IRQ line is reasserted and the
>> I2C_STAT[ARDY] bit set again on 1. In fact, the ARDY status bit is not cleared
>> at the write access to I2C_STAT[ARDY] and only the IRQ line is deasserted and
>> then reasserted. This is not captured in the usual errata documents.
>>
>> The workaround is to have a double clear of ARDY status in irq handler.
>
> I'll add this to omap-testing for few days and then if no issue Ben
> can merge this.

Thanks Tony.
>
> Regards,
>
> Tony
>
>> Signed-off-by: Richard woodruff <r-woodruff2-l0cyMroinI0@public.gmane.org>
>> Signed-off-by: Keerthy <j-keerthy-l0cyMroinI0@public.gmane.org>
>> ---
>>  drivers/i2c/busses/i2c-omap.c |    6 +++++-
>>  1 files changed, 5 insertions(+), 1 deletions(-)
>>
>> diff --git a/drivers/i2c/busses/i2c-omap.c b/drivers/i2c/busses/i2c-omap.c
>> index b605ff3..5b35cf4 100644
>> --- a/drivers/i2c/busses/i2c-omap.c
>> +++ b/drivers/i2c/busses/i2c-omap.c
>> @@ -847,11 +847,15 @@ complete:
>>                       dev_err(dev->dev, "Arbitration lost\n");
>>                       err |= OMAP_I2C_STAT_AL;
>>               }
>> +             /*
>> +              * ProDB0017052: Clear ARDY bit twice
>> +              */
>>               if (stat & (OMAP_I2C_STAT_ARDY | OMAP_I2C_STAT_NACK |
>>                                       OMAP_I2C_STAT_AL)) {
>>                       omap_i2c_ack_stat(dev, stat &
>>                               (OMAP_I2C_STAT_RRDY | OMAP_I2C_STAT_RDR |
>> -                             OMAP_I2C_STAT_XRDY | OMAP_I2C_STAT_XDR));
>> +                             OMAP_I2C_STAT_XRDY | OMAP_I2C_STAT_XDR |
>> +                             OMAP_I2C_STAT_ARDY));
>>                       omap_i2c_complete_cmd(dev, err);
>>                       return IRQ_HANDLED;
>>               }
>> --
>> 1.7.0.4
>>
>> --
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>



-- 
Regards and Thanks,
Keerthy