From mboxrd@z Thu Jan 1 00:00:00 1970 From: Harini Katakam Subject: [PATCH v6] i2c: cadence: Check for errata condition involving master receive Date: Wed, 14 Jan 2015 00:04:59 +0530 Message-ID: <1421174099-19839-1-git-send-email-harinik@xilinx.com> Return-path: Sender: linux-kernel-owner@vger.kernel.org To: wsa@the-dreams.de, mark.rutland@arm.com Cc: michal.simek@xilinx.com, soren.brinkmann@xilinx.com, linux-arm-kernel@lists.infradead.org, linux-i2c@vger.kernel.org, linux-kernel@vger.kernel.org, harinikatakamlinux@gmail.com, harinik@xilinx.com List-Id: linux-i2c@vger.kernel.org Cadence I2C controller has the following bugs: - completion indication is not given to the driver at the end of a read/receive transfer with HOLD bit set. - Invalid read transaction are generated on the bus when HW timeout condition occurs with HOLD bit set. As a result of the above, if a set of messages to be transferred with repeated start includes any message following a read message, completion is never indicated and timeout occurs. Hence a check is implemented to return -EOPNOTSUPP for such sequences. Signed-off-by: Harini Katakam Signed-off-by: Vishnu Motghare --- v6: - Correct if condition - add braces to include both statements. - Modify comments and warning message. v5: Make warning grepable in driver. v4: Use single dev_warn and make message grep-able. v3: Add warning in case of unsupported transfer. v2: Dont defeteature repeated start. Just check for unsupported conditions in the driver and return error. --- drivers/i2c/busses/i2c-cadence.c | 13 +++++++++++++ 1 file changed, 13 insertions(+) diff --git a/drivers/i2c/busses/i2c-cadence.c b/drivers/i2c/busses/i2c-cadence.c index 5f5d4fa..c7be4fb 100644 --- a/drivers/i2c/busses/i2c-cadence.c +++ b/drivers/i2c/busses/i2c-cadence.c @@ -541,6 +541,19 @@ static int cdns_i2c_master_xfer(struct i2c_adapter *adap, struct i2c_msg *msgs, * processed with a repeated start. */ if (num > 1) { + /* + * This controller does not give completion interrupt after a + * master receive message if HOLD bit is set (repeated start), + * resulting in SW timeout. Hence, if a receive message is + * followed by any other message, an error is returned + * indicating that this sequence is not supported. + */ + for (count = 0; count < num-1; count++) { + if (msgs[count].flags & I2C_M_RD) { + dev_warn(adap->dev.parent, "Can't do repeated start after a receive message\n"); + return -EOPNOTSUPP; + } + } id->bus_hold_flag = 1; reg = cdns_i2c_readreg(CDNS_I2C_CR_OFFSET); reg |= CDNS_I2C_CR_HOLD; -- 1.7.9.5