* [PATCH 1/1] i2c: designware-pcidrv: Add 10bit address feature to medfield/merrifield
@ 2016-11-30 14:48 Alexander Stein
2016-11-30 16:11 ` Andy Shevchenko
0 siblings, 1 reply; 2+ messages in thread
From: Alexander Stein @ 2016-11-30 14:48 UTC (permalink / raw)
To: Jarkko Nikula, Andy Shevchenko, Mika Westerberg, Wolfram Sang
Cc: Alexander Stein, linux-i2c
Both Merrifield TRM and Medfiel TRM state:
"Both 7-bit and 10-bit addressing modes are supported."
Cc: Andy Shevchenko <andriy.shevchenko@linux.intel.com>
Signed-off-by: Alexander Stein <alexander.stein@systec-electronic.com>
---
drivers/i2c/busses/i2c-designware-pcidrv.c | 2 ++
1 file changed, 2 insertions(+)
diff --git a/drivers/i2c/busses/i2c-designware-pcidrv.c b/drivers/i2c/busses/i2c-designware-pcidrv.c
index 300802e7..d6423cf 100644
--- a/drivers/i2c/busses/i2c-designware-pcidrv.c
+++ b/drivers/i2c/busses/i2c-designware-pcidrv.c
@@ -141,6 +141,7 @@ static struct dw_pci_controller dw_pci_controllers[] = {
.bus_cfg = INTEL_MID_STD_CFG | DW_IC_CON_SPEED_FAST,
.tx_fifo_depth = 32,
.rx_fifo_depth = 32,
+ .functionality = I2C_FUNC_10BIT_ADDR,
.clk_khz = 25000,
.setup = mfld_setup,
},
@@ -149,6 +150,7 @@ static struct dw_pci_controller dw_pci_controllers[] = {
.bus_cfg = INTEL_MID_STD_CFG | DW_IC_CON_SPEED_FAST,
.tx_fifo_depth = 64,
.rx_fifo_depth = 64,
+ .functionality = I2C_FUNC_10BIT_ADDR,
.scl_sda_cfg = &mrfld_config,
.setup = mrfld_setup,
},
--
2.7.3
^ permalink raw reply related [flat|nested] 2+ messages in thread* Re: [PATCH 1/1] i2c: designware-pcidrv: Add 10bit address feature to medfield/merrifield
2016-11-30 14:48 [PATCH 1/1] i2c: designware-pcidrv: Add 10bit address feature to medfield/merrifield Alexander Stein
@ 2016-11-30 16:11 ` Andy Shevchenko
0 siblings, 0 replies; 2+ messages in thread
From: Andy Shevchenko @ 2016-11-30 16:11 UTC (permalink / raw)
To: Alexander Stein, Jarkko Nikula, Mika Westerberg, Wolfram Sang; +Cc: linux-i2c
On Wed, 2016-11-30 at 15:48 +0100, Alexander Stein wrote:
> Both Merrifield TRM and Medfiel TRM state:
Typo here, should be Medfield
> "Both 7-bit and 10-bit addressing modes are supported."
Other that that
Acked-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com>
>
> Cc: Andy Shevchenko <andriy.shevchenko@linux.intel.com>
> Signed-off-by: Alexander Stein <alexander.stein@systec-electronic.com>
> ---
> drivers/i2c/busses/i2c-designware-pcidrv.c | 2 ++
> 1 file changed, 2 insertions(+)
>
> diff --git a/drivers/i2c/busses/i2c-designware-pcidrv.c
> b/drivers/i2c/busses/i2c-designware-pcidrv.c
> index 300802e7..d6423cf 100644
> --- a/drivers/i2c/busses/i2c-designware-pcidrv.c
> +++ b/drivers/i2c/busses/i2c-designware-pcidrv.c
> @@ -141,6 +141,7 @@ static struct dw_pci_controller
> dw_pci_controllers[] = {
> .bus_cfg = INTEL_MID_STD_CFG |
> DW_IC_CON_SPEED_FAST,
> .tx_fifo_depth = 32,
> .rx_fifo_depth = 32,
> + .functionality = I2C_FUNC_10BIT_ADDR,
> .clk_khz = 25000,
> .setup = mfld_setup,
> },
> @@ -149,6 +150,7 @@ static struct dw_pci_controller
> dw_pci_controllers[] = {
> .bus_cfg = INTEL_MID_STD_CFG | DW_IC_CON_SPEED_FAST,
> .tx_fifo_depth = 64,
> .rx_fifo_depth = 64,
> + .functionality = I2C_FUNC_10BIT_ADDR,
> .scl_sda_cfg = &mrfld_config,
> .setup = mrfld_setup,
> },
--
Andy Shevchenko <andriy.shevchenko@linux.intel.com>
Intel Finland Oy
^ permalink raw reply [flat|nested] 2+ messages in thread
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