From: Joakim Tjernlund <Joakim.Tjernlund@infinera.com>
To: "wsa@the-dreams.de" <wsa@the-dreams.de>
Cc: "scottwood@freescale.com" <scottwood@freescale.com>,
"linux-i2c@vger.kernel.org" <linux-i2c@vger.kernel.org>
Subject: Re: [PATCH] i2c-mpc: Correct I2C reset procedure
Date: Thu, 11 May 2017 11:42:16 +0000 [thread overview]
Message-ID: <1494502934.5113.62.camel@infinera.com> (raw)
In-Reply-To: <20170511112828.nwdmd7kqx3zciyaa@ninjato>
On Thu, 2017-05-11 at 13:28 +0200, Wolfram Sang wrote:
> On Tue, May 09, 2017 at 02:03:51PM +0200, Joakim Tjernlund wrote:
> > Current I2C reset procedure is broken in two ways:
> > 1) It only generate 1 START instead of 9 STARTs and STOP.
> > 2) It leaves the bus Busy so every I2C xfer after the first
> > fixup calls the reset routine again, for every xfer there after.
> >
> > This fixes both errors. Add an iobarrier_rw() when writing the
> > I2C control register as well to make sure the register reaches the
> > controller in time.
> >
> > Signed-off-by: Joakim Tjernlund <joakim.tjernlund@infinera.com>
>
> BTW can this driver be converted to make use of the bus_recovery
> infrastructure?
>
Maybe, I not familiar with this infrastructure. I did take a look at i2c_generic_recovery()
though and I do not agree with that impl.
The 9 clk's fixup does not cover the the case when an I2C device is stuck write.
To fix stuck in both cases(read or write) you need to generate 9 clk's with a
START in each clk, then a STOP to release the bus.
Jocke
prev parent reply other threads:[~2017-05-11 11:42 UTC|newest]
Thread overview: 7+ messages / expand[flat|nested] mbox.gz Atom feed top
2017-05-09 12:03 [PATCH] i2c-mpc: Correct I2C reset procedure Joakim Tjernlund
2017-05-09 20:54 ` Scott Wood
2017-05-10 7:02 ` Joakim Tjernlund
2017-05-11 1:42 ` Scott Wood
2017-05-11 11:23 ` Joakim Tjernlund
2017-05-11 11:28 ` [PATCH] " Wolfram Sang
2017-05-11 11:42 ` Joakim Tjernlund [this message]
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