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AJvYcCVX+MeMkktjM0kA6LrynFXfMZ6Yacds7sNl2g92tEPFqcneo70/wnukGt1SgtLhxbsX+m460eCwMQU=@vger.kernel.org X-Gm-Message-State: AOJu0YyEnJZgnbBWpWIS4gkVjvm/8XjDzO1nBJ6NM4JHYco6VSyD9m15 DQjofRs9DctCLL/I9RkXzUZtiD1m4//iobF4bwNuvqAd3+jghTrChFNV8bNgbPc= X-Google-Smtp-Source: AGHT+IFK7oph7GwaEWD7zoicMYmJ5UGwD8BU97Va+ifCWsc3lj4TsWyehOg952PcB4gWZzCeA6GyqA== X-Received: by 2002:a05:600c:198c:b0:431:93d8:e1a1 with SMTP id 5b1f17b1804b1-4319ad08b39mr247904665e9.27.1730709814507; Mon, 04 Nov 2024 00:43:34 -0800 (PST) Received: from localhost ([2a01:e0a:3c5:5fb1:3924:2486:a349:2c6]) by smtp.gmail.com with ESMTPSA id 5b1f17b1804b1-431bd910718sm179061875e9.12.2024.11.04.00.43.33 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Mon, 04 Nov 2024 00:43:34 -0800 (PST) From: Jerome Brunet To: Guenter Roeck Cc: Jean Delvare , Jonathan Corbet , Patrick Rudolph , Naresh Solanki , Rob Herring , Krzysztof Kozlowski , Conor Dooley , Delphine CC Chiu , linux-hwmon@vger.kernel.org, linux-kernel@vger.kernel.org, linux-doc@vger.kernel.org, devicetree@vger.kernel.org, linux-i2c@vger.kernel.org Subject: Re: [PATCH v3 3/6] hwmon: (pmbus/core) add wp module param In-Reply-To: <47164712-876e-4bb8-a4fa-4b3d91f2554b@roeck-us.net> (Guenter Roeck's message of "Fri, 1 Nov 2024 08:08:31 -0700") References: <20241024-tps25990-v3-0-b6a6e9d4b506@baylibre.com> <20241024-tps25990-v3-3-b6a6e9d4b506@baylibre.com> <47164712-876e-4bb8-a4fa-4b3d91f2554b@roeck-us.net> Date: Mon, 04 Nov 2024 09:43:33 +0100 Message-ID: <1jjzdj5qyy.fsf@starbuckisacylon.baylibre.com> Precedence: bulk X-Mailing-List: linux-i2c@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Type: text/plain On Fri 01 Nov 2024 at 08:08, Guenter Roeck wrote: > On Thu, Oct 24, 2024 at 08:10:37PM +0200, Jerome Brunet wrote: >> Add a module parameter to force the write protection mode of pmbus chips. >> >> 2 protections modes are provided to start with: >> * 0: Remove the write protection if possible >> * 1: Enable full write protection if possible >> >> Of course, if the parameter is not provided, the default write protection >> status of the pmbus chips is left untouched. >> >> Suggested-by: Guenter Roeck >> Signed-off-by: Jerome Brunet >> --- >> Documentation/admin-guide/kernel-parameters.txt | 4 ++ >> drivers/hwmon/pmbus/pmbus_core.c | 74 ++++++++++++++++++------- >> 2 files changed, 59 insertions(+), 19 deletions(-) >> >> diff --git a/Documentation/admin-guide/kernel-parameters.txt b/Documentation/admin-guide/kernel-parameters.txt >> index 1518343bbe2237f1d577df5656339d6224b769be..aa79242fe0a9238f618182289f18563ed63cba1c 100644 >> --- a/Documentation/admin-guide/kernel-parameters.txt >> +++ b/Documentation/admin-guide/kernel-parameters.txt >> @@ -4733,6 +4733,10 @@ >> Format: { parport | timid | 0 } >> See also Documentation/admin-guide/parport.rst. >> >> + pmbus.wp= [HW] PMBus Chips write protection forced mode >> + Format: { 0 | 1 } >> + See drivers/hwmon/pmbus/pmbus_core.c >> + > > I have always seen that file as applicable for core kernel parameters, > not for driver kernel parameters. I can not accept a global change like > this without guidance. Please explain why it is desirable to have this > parameter documented here and not in driver documentation. No reason other than trying to document things the best I can. Other subsystemw are documenting things in here too, I just did the same See 'regulator_ignore_unused' for example. I don't mind dropping this hunk if you prefer it that way. > >> pmtmr= [X86] Manual setup of pmtmr I/O Port. >> Override pmtimer IOPort with a hex value. >> e.g. pmtmr=0x508 >> diff --git a/drivers/hwmon/pmbus/pmbus_core.c b/drivers/hwmon/pmbus/pmbus_core.c >> index 7bdd8f2ffcabc51500437182f411e9826cd7a55d..ce697ca03de01c0e5a352f8f6b72671137721868 100644 >> --- a/drivers/hwmon/pmbus/pmbus_core.c >> +++ b/drivers/hwmon/pmbus/pmbus_core.c >> @@ -31,6 +31,20 @@ >> #define PMBUS_ATTR_ALLOC_SIZE 32 >> #define PMBUS_NAME_SIZE 24 >> >> +/* >> + * PMBus write protect forced mode: >> + * PMBus may come up with a variety of write protection configuration. >> + * 'pmbus_wp' may be used if a particular write protection is necessary. >> + * The ability to actually alter the protection may also depend on the chip >> + * so the actual runtime write protection configuration may differ from >> + * the requested one. pmbus_core currently support the following value: >> + * - 0: write protection removed >> + * - 1: write protection fully enabled, including OPERATION and VOUT_COMMAND >> + * registers. Chips essentially become read-only with this. > > Would it be desirable to also suppport the ability to set the output voltage > but not limits (PB_WP_VOUT) ? I was starting simple, it is doable sure. It is not something I will be able to test on actual since does not support that. Do you want me to add "2: write protection enable execpt for VOUT_COMMAND." ? > > Guenter -- Jerome