I2C controller i2c-mv64xxx.c not compliant

[Rodolfo Giometti <giometti-AVVDYK/kqiJWk0Htik3J/w@public.gmane.org>]

Hello,

I'm using a ltc4266 (PoE chip) with the Marvell i2c controller (CPU
Feroceon 88FR131).

The ltc4266 wants a repeated START during a write/read sequence,
i.e. in order to read a register with the following messages:

        u8 reg = <address>;
	u8 val;
        struct i2c_msg msg[] = {
                { client->addr, 0, 1, &reg },
                { client->addr, I2C_M_RD, 1, &val },
        };

the master _must_ send a repeated START at beginning of the read
message otherwise the ltc4266 will reset its internal address register
and the master will read the register 0x00 each time!

Looking at the code the i2c-mv64xxx.c driver sends a STOP at each
message's end, but into the file include/linux/i2c.h is stated:

 * Except when I2C "protocol mangling" is used, all I2C adapters implement
 * the standard rules for I2C transactions.  Each transaction begins with a
 * START.  That is followed by the slave address, and a bit encoding read
 * versus write.  Then follow all the data bytes, possibly including a byte
 * with SMBus PEC.  The transfer terminates with a NAK, or when all those
 * bytes have been transferred and ACKed.  If this is the last message in a
 * group, it is followed by a STOP.  Otherwise it is followed by the next
 * @i2c_msg transaction segment, beginning with a (repeated) START.

Any suggestions in order to fix it?

Ciao,

Rodolfo

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