From mboxrd@z Thu Jan  1 00:00:00 1970
From: Mark Brown <broonie-yzvPICuk2AATkU/dhu1WVueM+bqZidxxQQ4Iyu8u01E@public.gmane.org>
Subject: Re: [PATCH 2/2] i2c-algo-bit: Complain about masters which can't
	read SCL
Date: Tue, 7 Dec 2010 12:10:10 +0000
Message-ID: <20101207121009.GD10722@sirena.org.uk>
References: <20101207110705.69792a1a@endymion.delvare>
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To: Jean Delvare <khali-PUYAD+kWke1g9hUCZPvPmw@public.gmane.org>
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On Tue, Dec 07, 2010 at 11:07:05AM +0100, Jean Delvare wrote:
> The I2C specification explicitly describes both SDA and SCL as
> bidirectional lines. An I2C master with a read-only SCL is thus not
> compliant. If a slow slave stretches the clock, errors will happen,
> so the bus can't be considered as reliable.
> 
> Signed-off-by: Jean Delvare <khali-PUYAD+kWke1g9hUCZPvPmw@public.gmane.org>

It'd be good to also flag this via sysfs so that it's more readily
visible to things like diagnostic tools.