From: "Jayachandran C." <jayachandranc-oSioyQM9ZPnuBjGU1YDckgC/G2K4zDHf@public.gmane.org>
To: Shubhrajyoti Datta
<omaplinuxkernel-Re5JQEeQqe8AvxtiuMwx3w@public.gmane.org>
Cc: linux-i2c-u79uwXL29TY76Z2rM5mHXA@public.gmane.org,
w.sang-bIcnvbaLZ9MEGnE8C9+IrQ@public.gmane.org,
ben-linux-elnMNo+KYs3YtjvyW6yDsg@public.gmane.org,
Ganesan Ramalingam
<ganesanr-dY08KVG/lbpWk0Htik3J/w@public.gmane.org>
Subject: Re: [PATCH 2/2] i2c-ocore: support 16 and 32-bit wide registers
Date: Sat, 12 May 2012 11:07:25 +0530 [thread overview]
Message-ID: <20120512053722.GC23689@jayachandranc.netlogicmicro.com> (raw)
In-Reply-To: <CAM=Q2cuYCQu1McDD=otyyBFSG8Tw974Y146tAswZ3dD+USkiTw-JsoAwUIsXosN+BqQ9rBEUg@public.gmane.org>
On Tue, May 08, 2012 at 10:28:34PM +0530, Shubhrajyoti Datta wrote:
> Hi,
>
> On Tue, May 8, 2012 at 6:55 PM, Jayachandran C
> <jayachandranc-oSioyQM9ZPnuBjGU1YDckgC/G2K4zDHf@public.gmane.org> wrote:
> > From: Ganesan Ramalingam <ganesanr-dY08KVG/lbpWk0Htik3J/w@public.gmane.org>
> >
> > Some architectures supports only 16-bit or 32-bit read/write access
> > to their iospace. Add a 'regwidth' platform and OF parameter which
> > specifies the IO width to support these platforms.
> >
> > regwidth can be specified as 1, 2 or 4, and has a default value
> > of 1 if it is unspecified.
> >
> > Signed-off-by: Ganesan Ramalingam <ganesanr-dY08KVG/lbpWk0Htik3J/w@public.gmane.org>
> > Signed-off-by: Jayachandran C <jayachandranc-oSioyQM9ZPnuBjGU1YDckgC/G2K4zDHf@public.gmane.org>
> > ---
> > drivers/i2c/busses/i2c-ocores.c | 32 ++++++++++++++++++++++++++++++--
> > include/linux/i2c-ocores.h | 1 +
> > 2 files changed, 31 insertions(+), 2 deletions(-)
> >
> > diff --git a/drivers/i2c/busses/i2c-ocores.c b/drivers/i2c/busses/i2c-ocores.c
> > index ebd2700..1313145 100644
> > --- a/drivers/i2c/busses/i2c-ocores.c
> > +++ b/drivers/i2c/busses/i2c-ocores.c
> > @@ -60,6 +64,7 @@
> > struct ocores_i2c {
> > void __iomem *base;
> > int regstep;
> > + int regwidth;
>
> Do we need it to be signed?
regstep and regwidth can be both unsigned, but since regstep is already
defined as int, we just followed that convention.
>
> > wait_queue_head_t wait;
> > struct i2c_adapter adap;
> > struct i2c_msg *msg;
> > @@ -102,12 +107,22 @@ struct ocores_i2c {
> >
> > static inline void oc_setreg(struct ocores_i2c *i2c, int reg, u8 value)
> > {
> > - iowrite8(value, i2c->base + reg * i2c->regstep);
> > + if (i2c->regwidth == 4)
> > + iowrite32(value, i2c->base + reg * i2c->regstep);
> > + else if (i2c->regwidth == 2)
> > + iowrite16(value, i2c->base + reg * i2c->regstep);
> > + else
> > + iowrite8(value, i2c->base + reg * i2c->regstep);
> > }
> >
> > static inline u8 oc_getreg(struct ocores_i2c *i2c, int reg)
>
> Shouldnt the return type also change?
>
No, the registers have only 8bit of data, and we do a 16/32 bit read and
return the lowest 8 bits.
Regards,
JC.
next prev parent reply other threads:[~2012-05-12 5:37 UTC|newest]
Thread overview: 9+ messages / expand[flat|nested] mbox.gz Atom feed top
2012-05-08 13:25 [PATCH 0/2] i2c: open cores I2C changes for XLP Jayachandran C
[not found] ` <1336483529-19140-1-git-send-email-jayachandranc-oSioyQM9ZPnuBjGU1YDckgC/G2K4zDHf@public.gmane.org>
2012-05-08 13:25 ` [PATCH 1/2] i2c-ocore: register OF i2c devices Jayachandran C
[not found] ` <1336483529-19140-2-git-send-email-jayachandranc-oSioyQM9ZPnuBjGU1YDckgC/G2K4zDHf@public.gmane.org>
2012-05-12 14:52 ` Wolfram Sang
[not found] ` <20120512145205.GL20673-bIcnvbaLZ9MEGnE8C9+IrQ@public.gmane.org>
2012-05-28 21:31 ` Peter Korsgaard
2012-05-08 13:25 ` [PATCH 2/2] i2c-ocore: support 16 and 32-bit wide registers Jayachandran C
[not found] ` <1336483529-19140-3-git-send-email-jayachandranc-oSioyQM9ZPnuBjGU1YDckgC/G2K4zDHf@public.gmane.org>
2012-05-08 16:58 ` Shubhrajyoti Datta
[not found] ` <CAM=Q2cuYCQu1McDD=otyyBFSG8Tw974Y146tAswZ3dD+USkiTw-JsoAwUIsXosN+BqQ9rBEUg@public.gmane.org>
2012-05-12 5:37 ` Jayachandran C. [this message]
2012-05-12 14:56 ` Wolfram Sang
[not found] ` <20120512145648.GM20673-bIcnvbaLZ9MEGnE8C9+IrQ@public.gmane.org>
2012-05-13 11:39 ` Jayachandran C.
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