From mboxrd@z Thu Jan 1 00:00:00 1970 From: Marek Vasut Subject: Re: [PATCH 1/2 V3] MXS: Set I2C timing registers for mxs-i2c Date: Sat, 23 Jun 2012 20:47:32 +0200 Message-ID: <201206232047.33228.marex@denx.de> References: <1339242351-8797-1-git-send-email-marex@denx.de> Mime-Version: 1.0 Content-Type: Text/Plain; charset="us-ascii" Content-Transfer-Encoding: 7bit Return-path: In-Reply-To: <1339242351-8797-1-git-send-email-marex-ynQEQJNshbs@public.gmane.org> Sender: linux-i2c-owner-u79uwXL29TY76Z2rM5mHXA@public.gmane.org To: linux-i2c-u79uwXL29TY76Z2rM5mHXA@public.gmane.org Cc: Detlev Zundel , Dong Aisheng , Fabio Estevam , Linux ARM kernel , Sascha Hauer , Shawn Guo , Stefano Babic , Uwe =?iso-8859-1?q?Kleine-K=F6nig?= , Wolfgang Denk , Wolfram Sang List-Id: linux-i2c@vger.kernel.org Dear Shawn Guo, > This patch configures the I2C bus timing registers according > to information passed via DT. Currently, 100kHz and 400kHz > modes are supported. [...] Is there any reason why this can not be merged other than the timing registers goo (which I believe shall stay as in the datasheet until we figure out if it's even reasonable to add some computation there). Best regards, Marek Vasut