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From: Jean Delvare <khali-PUYAD+kWke1g9hUCZPvPmw@public.gmane.org>
To: Matthias Urlichs <matthias-+qxcz+fHsVSELgA04lAiVw@public.gmane.org>
Cc: linux-i2c-u79uwXL29TY76Z2rM5mHXA@public.gmane.org
Subject: Re: State of arbitration and i2c_gpio?
Date: Mon, 16 Jul 2012 22:58:27 +0200	[thread overview]
Message-ID: <20120716225827.3425f4f8@endymion.delvare> (raw)
In-Reply-To: <loom.20120710T223443-322-eS7Uydv5nfjZ+VzJOa5vwg@public.gmane.org>

Hallo Matthias,

On Mon, 16 Jul 2012 15:15:29 +0000 (UTC), Matthias Urlichs wrote:
> I'd like to ask whether anybody is working on adding arbitration support to
> i2c_algo_bit.c. The code still has the old "FIXME do arbitration here" comments,
> added five years ago when the I²C was imported into Linux 2.3.34pre1. :-/

Not that I am aware of.

> If not, and I'm going to have to do that myself … my main question is, even
> before I get to that -- how do I even detect that the bus is idle? Turn
> interrupts off and busy-loop-check that both SCL and SDA stay high for at least
> one and a half clock periods?

I was staring at this very FIXME comment in i2c-algo-bit a few weeks
ago and my thoughts were along the lines of "can this be implemented at
all?" We can't monitor SCL and SDA continuously with a pure software
implementation. We can do best effort, but the closer to perfection we
want to be, the more expensive. If both pins can trigger an interrupt
when their level changes, we could use this feature, but OTOH we
certainly don't want to receive interrupts the rest of the time, so
we'd have to repeatedly enable/disable these interrupts. If we don't
have such interrupts then indeed busy polling (or close to that) is the
only way I can think of.

Note that "one and a half clock period" is not something which
evaluates to a number. You have no idea at what frequency the other
master, if it exists, would be driving the bus. And the I2C
specification does not specify a minimum operating frequency, so in
theory you'd have to wait... forever. To solve this problem, SMBus
specifies a 50 µs maximum bus idle time (which corresponds to a 10 kHz
clock, the minimum allowed under SMBus.) I suppose this is a sane
setting in practice even for I2C controllers. At the other end of the
spectrum, we have to deal with the maximum I2C frequency, 400 kHz in
our context. This means you can't have more than 1.25 µs between polls.
Not sure we can actually guarantee that...

In all cases we'll certainly want to let adapters tell whether they are
operating on a multi-master bus or not, so that the whole thing can be
disabled when not needed.

-- 
Jean Delvare

  parent reply	other threads:[~2012-07-16 20:58 UTC|newest]

Thread overview: 6+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2012-07-16 15:15 State of arbitration and i2c_gpio? Matthias Urlichs
     [not found] ` <loom.20120710T223443-322-eS7Uydv5nfjZ+VzJOa5vwg@public.gmane.org>
2012-07-16 16:05   ` Laxman Dewangan
2012-07-16 20:58   ` Jean Delvare [this message]
     [not found]     ` <20120716225827.3425f4f8-R0o5gVi9kd7kN2dkZ6Wm7A@public.gmane.org>
2012-07-17  6:55       ` Matthias Urlichs
     [not found]         ` <20120717065544.GF11678-ci3XGGwdvIcvfNposrsB4g@public.gmane.org>
2012-07-17  7:11           ` Jean Delvare
     [not found]             ` <20120717091115.44e28fd0-R0o5gVi9kd7kN2dkZ6Wm7A@public.gmane.org>
2012-07-17  8:46               ` Matthias Urlichs

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