[PATCH] i2c-i801: Enable interrupts for all post-ICH5 chips

[PATCH] i2c-i801: Enable interrupts for all post-ICH5 chips

[Jean Delvare]

I did not receive a single bug report after interrupt support was
added for a limited number of chips. So I'd say the code is good and
should be enabled for all supported chips, that is: ICH5 and later.

For now the IDF channels are excluded as I have no idea if they
support interrupts too or not.

Signed-off-by: Jean Delvare <khali-PUYAD+kWke1g9hUCZPvPmw@public.gmane.org>
Cc: Daniel Kurtz <djkurtz-F7+t8E8rja9g9hUCZPvPmw@public.gmane.org>
---
Would be great if someone could test interrupts on IDF channels and
report.

 drivers/i2c/busses/i2c-i801.c |   12 ++----------
 1 file changed, 2 insertions(+), 10 deletions(-)

--- linux-3.7-rc3.orig/drivers/i2c/busses/i2c-i801.c	2012-10-31 11:45:15.000000000 +0100
+++ linux-3.7-rc3/drivers/i2c/busses/i2c-i801.c	2012-10-31 11:49:01.064163932 +0100
@@ -1109,6 +1109,8 @@ static int __devinit i801_probe(struct p
 		/* fall through */
 	default:
 		priv->features |= FEATURE_I2C_BLOCK_READ;
+		if (!(priv->features & FEATURE_IDF))
+			priv->features |= FEATURE_IRQ;
 		/* fall through */
 	case PCI_DEVICE_ID_INTEL_82801DB_3:
 		priv->features |= FEATURE_SMBUS_PEC;
@@ -1121,16 +1123,6 @@ static int __devinit i801_probe(struct p
 		break;
 	}
 
-	/* IRQ processing tested on CougarPoint PCH, ICH5, ICH7-M and ICH10 */
-	if (dev->device == PCI_DEVICE_ID_INTEL_COUGARPOINT_SMBUS ||
-	    dev->device == PCI_DEVICE_ID_INTEL_82801EB_3 ||
-	    dev->device == PCI_DEVICE_ID_INTEL_ICH7_17 ||
-	    dev->device == PCI_DEVICE_ID_INTEL_ICH8_5 ||
-	    dev->device == PCI_DEVICE_ID_INTEL_ICH9_6 ||
-	    dev->device == PCI_DEVICE_ID_INTEL_ICH10_4 ||
-	    dev->device == PCI_DEVICE_ID_INTEL_ICH10_5)
-		priv->features |= FEATURE_IRQ;
-
 	/* Disable features on user request */
 	for (i = 0; i < ARRAY_SIZE(i801_feature_names); i++) {
 		if (priv->features & disable_features & (1 << i))


-- 
Jean Delvare

[PATCH v2] i2c-i801: Enable interrupts for all post-ICH5 chips

[Jean Delvare]

I did not receive a single bug report after interrupt support was
added for a limited number of chips. So I'd say the code is good and
should be enabled for all supported chips, that is: ICH5 and later.

Signed-off-by: Jean Delvare <khali-PUYAD+kWke1g9hUCZPvPmw@public.gmane.org>
Cc: Daniel Kurtz <djkurtz-F7+t8E8rja9g9hUCZPvPmw@public.gmane.org>
---
I was able to test on Patsburg IDF channels and although I couldn't
test all transaction types, interrupts seem to work the same as on the
main SMBus channel so let's enable interrupts there too.

 drivers/i2c/busses/i2c-i801.c |   11 +----------
 1 file changed, 1 insertion(+), 10 deletions(-)

--- linux-3.7-rc4.orig/drivers/i2c/busses/i2c-i801.c	2012-11-05 16:55:23.271739149 +0100
+++ linux-3.7-rc4/drivers/i2c/busses/i2c-i801.c	2012-11-06 19:26:04.073280924 +0100
@@ -1109,6 +1109,7 @@ static int __devinit i801_probe(struct p
 		/* fall through */
 	default:
 		priv->features |= FEATURE_I2C_BLOCK_READ;
+		priv->features |= FEATURE_IRQ;
 		/* fall through */
 	case PCI_DEVICE_ID_INTEL_82801DB_3:
 		priv->features |= FEATURE_SMBUS_PEC;
@@ -1121,16 +1122,6 @@ static int __devinit i801_probe(struct p
 		break;
 	}
 
-	/* IRQ processing tested on CougarPoint PCH, ICH5, ICH7-M and ICH10 */
-	if (dev->device == PCI_DEVICE_ID_INTEL_COUGARPOINT_SMBUS ||
-	    dev->device == PCI_DEVICE_ID_INTEL_82801EB_3 ||
-	    dev->device == PCI_DEVICE_ID_INTEL_ICH7_17 ||
-	    dev->device == PCI_DEVICE_ID_INTEL_ICH8_5 ||
-	    dev->device == PCI_DEVICE_ID_INTEL_ICH9_6 ||
-	    dev->device == PCI_DEVICE_ID_INTEL_ICH10_4 ||
-	    dev->device == PCI_DEVICE_ID_INTEL_ICH10_5)
-		priv->features |= FEATURE_IRQ;
-
 	/* Disable features on user request */
 	for (i = 0; i < ARRAY_SIZE(i801_feature_names); i++) {
 		if (priv->features & disable_features & (1 << i))

-- 
Jean Delvare

Re: [PATCH v2] i2c-i801: Enable interrupts for all post-ICH5 chips

[Daniel Kurtz]

Hi Jean,

On Wed, Nov 7, 2012 at 3:38 AM, Jean Delvare <khali-PUYAD+kWke1g9hUCZPvPmw@public.gmane.org> wrote:
> I did not receive a single bug report after interrupt support was
> added for a limited number of chips. So I'd say the code is good and
> should be enabled for all supported chips, that is: ICH5 and later.
>
> Signed-off-by: Jean Delvare <khali-PUYAD+kWke1g9hUCZPvPmw@public.gmane.org>
> Cc: Daniel Kurtz <djkurtz-F7+t8E8rja9g9hUCZPvPmw@public.gmane.org>
> ---
> I was able to test on Patsburg IDF channels and although I couldn't
> test all transaction types, interrupts seem to work the same as on the
> main SMBus channel so let's enable interrupts there too.


I can confirm that the IRQ works on PantherPoint at least, if enabled
(by this patch, for example).  However, I don't know anything about
IDF, so I can't help there.
Here's an R-B, if you need it:

Reviewed-by: Daniel Kurtz <djkurtz-F7+t8E8rja9g9hUCZPvPmw@public.gmane.org>

Are you targeting this for 3.8?

>
>  drivers/i2c/busses/i2c-i801.c |   11 +----------
>  1 file changed, 1 insertion(+), 10 deletions(-)
>
> --- linux-3.7-rc4.orig/drivers/i2c/busses/i2c-i801.c    2012-11-05 16:55:23.271739149 +0100
> +++ linux-3.7-rc4/drivers/i2c/busses/i2c-i801.c 2012-11-06 19:26:04.073280924 +0100
> @@ -1109,6 +1109,7 @@ static int __devinit i801_probe(struct p
>                 /* fall through */
>         default:
>                 priv->features |= FEATURE_I2C_BLOCK_READ;
> +               priv->features |= FEATURE_IRQ;
>                 /* fall through */
>         case PCI_DEVICE_ID_INTEL_82801DB_3:
>                 priv->features |= FEATURE_SMBUS_PEC;
> @@ -1121,16 +1122,6 @@ static int __devinit i801_probe(struct p
>                 break;
>         }
>
> -       /* IRQ processing tested on CougarPoint PCH, ICH5, ICH7-M and ICH10 */
> -       if (dev->device == PCI_DEVICE_ID_INTEL_COUGARPOINT_SMBUS ||
> -           dev->device == PCI_DEVICE_ID_INTEL_82801EB_3 ||
> -           dev->device == PCI_DEVICE_ID_INTEL_ICH7_17 ||
> -           dev->device == PCI_DEVICE_ID_INTEL_ICH8_5 ||
> -           dev->device == PCI_DEVICE_ID_INTEL_ICH9_6 ||
> -           dev->device == PCI_DEVICE_ID_INTEL_ICH10_4 ||
> -           dev->device == PCI_DEVICE_ID_INTEL_ICH10_5)
> -               priv->features |= FEATURE_IRQ;
> -
>         /* Disable features on user request */
>         for (i = 0; i < ARRAY_SIZE(i801_feature_names); i++) {
>                 if (priv->features & disable_features & (1 << i))
>
> --
> Jean Delvare

Re: [PATCH v2] i2c-i801: Enable interrupts for all post-ICH5 chips

[Jean Delvare]

Hi Daniel,

On Thu, 13 Dec 2012 09:53:10 +0800, Daniel Kurtz wrote:
> Hi Jean,
> 
> On Wed, Nov 7, 2012 at 3:38 AM, Jean Delvare <khali-PUYAD+kWke1g9hUCZPvPmw@public.gmane.org> wrote:
> > I did not receive a single bug report after interrupt support was
> > added for a limited number of chips. So I'd say the code is good and
> > should be enabled for all supported chips, that is: ICH5 and later.
> >
> > Signed-off-by: Jean Delvare <khali-PUYAD+kWke1g9hUCZPvPmw@public.gmane.org>
> > Cc: Daniel Kurtz <djkurtz-F7+t8E8rja9g9hUCZPvPmw@public.gmane.org>
> > ---
> > I was able to test on Patsburg IDF channels and although I couldn't
> > test all transaction types, interrupts seem to work the same as on the
> > main SMBus channel so let's enable interrupts there too.
> 
> 
> I can confirm that the IRQ works on PantherPoint at least, if enabled
> (by this patch, for example).  However, I don't know anything about
> IDF, so I can't help there.
> Here's an R-B, if you need it:
> 
> Reviewed-by: Daniel Kurtz <djkurtz-F7+t8E8rja9g9hUCZPvPmw@public.gmane.org>

Thanks for the testing and review.

> Are you targeting this for 3.8?

Yes I am. I'll send the remaining patches in my i2c queue to Linus
later today.

-- 
Jean Delvare