From mboxrd@z Thu Jan 1 00:00:00 1970 From: Mika Westerberg Subject: Re: [PATCH 1/2] i2c: designware: fix race between subsequent xfers Date: Fri, 7 Jun 2013 08:23:53 +0300 Message-ID: <20130607052353.GB11878@intel.com> References: <1370526216-10060-1-git-send-email-christian.ruppert@abilis.com> Mime-Version: 1.0 Content-Type: text/plain; charset=us-ascii Return-path: Content-Disposition: inline In-Reply-To: <1370526216-10060-1-git-send-email-christian.ruppert-ux6zf3SgZrrQT0dZR+AlfA@public.gmane.org> Sender: linux-i2c-owner-u79uwXL29TY76Z2rM5mHXA@public.gmane.org To: Christian Ruppert Cc: Wolfram Sang , Jean Delvare , Pierrick Hascoet , linux-i2c-u79uwXL29TY76Z2rM5mHXA@public.gmane.org, linux-kernel-u79uwXL29TY76Z2rM5mHXA@public.gmane.org List-Id: linux-i2c@vger.kernel.org Hi Christian, On Thu, Jun 06, 2013 at 03:43:35PM +0200, Christian Ruppert wrote: > The designware block is not always properly disabled in the case of > transfer errors. Interrupts from aborted transfers might be handled > after the data structures for the following transfer are initialised but > before the hardware is set up. This might corrupt the data structures to > the point that the system is stuck in an infinite interrupt loop (where > FIFOs are never emptied). > This patch cleanly disables the designware-i2c hardware at the end of > every transfer, successful or not. Have you tried with the latest mainline driver? There is a commit that solves similar problem: 2a2d95e9d6d29e7 i2c: designware: always clear interrupts before enabling them Maybe it helps?