Re: [PATCH v2] i2c: i2c-mxs: Use DMA mode even for small transfers

[Marek Vasut <marex-ynQEQJNshbs@public.gmane.org>]

Dear Alexandre Belloni,

> Hi Marek,
> 
> On 03/07/2013 06:37, Marek Vasut wrote:
> > I'm attaching a patch. Alex, please give it a go and see if it fixes your
> > issue. It is _VERY_ ugly.
> 
> Quite ugly ;)
> 
> It indeed seems to fix the issue.
> 
> > The basic idea behind the the patch is that, as (attempted to be)
> > explained above, subsequent writes to DATA register in PIO mode cause
> > constant generation of clock on the bus and therefore a very long
> > transfer of zero data. This confuses the I2C peripherals of course.
> > 
> > The patch implements clock stretching for PIO writes (maybe we need this
> > for reads too) by making the controller blast out only 4 (or less) bytes
> > of data in each write into the DATA register. To prevent interruption of
> > the transfer between writes into the DATA register, the SCK is held low
> > using the RETAIN_CLOCK bit.
> > 
> > But (!) here comes the caveat. The PIO was introduced to speed up small
> > transfers. Introducing clock stretching into PIO mode operation might
> > completely remove this advantage. This has to be measured again.
> 
> And now, PIO mode is slower than DMA...

Further digging needed then. I will update you when I'm done, but I won't be in 
my office tomorrow, so probably on friday.

Best regards,
Marek Vasut