Re: [PATCH] i2c: mxs: Rework the PIO mode operation

[Marek Vasut <marex-ynQEQJNshbs@public.gmane.org>]

Hi,

> Analyze and rework the PIO mode operation. The PIO mode operation
> was unreliable on MX28, by analyzing the bus with LA, the checks
> for when data were available or were to be sent were wrong.
> 
> The PIO WRITE has to be completely reworked as it multiple problems.
> The MX23 datasheet helped here, see comments in the code for details.
> The problems boil down to:
> - RUN bit in CTRL0 must be set after DATA register was written
> - The PIO transfer must be 4 bytes long tops, otherwise use
>   clock stretching.
> Both of these fixes are implemented.
> 
> The PIO READ operation can only be done for up to four bytes as
> we are unable to read out the data from the DATA register fast
> enough.
> 
> This patch also tries to document the investigation within the
> code.

Please test the patch, it'd be really nice to see how it behaves now.

Note the I2C is still broken on MX23. For some reason, even the PIO doesn't work 
well with EEPROM. When writing EEPROM on MX23, I see it sends the first 3-byte 
WRITE command (address + 2 bytes of in-array address) , then the payload , but 
after both transfers, there is one more 0x00 byte sent , followed by NAK+STOP. 
No idea what that one final byte is.

Best regards,
Marek Vasut