From mboxrd@z Thu Jan 1 00:00:00 1970 From: Marek Vasut Subject: Re: [PATCH] i2c: mxs: Rework the PIO mode operation Date: Mon, 15 Jul 2013 04:05:52 +0200 Message-ID: <201307150405.53110.marex@denx.de> References: <1373312807-13227-1-git-send-email-marex@denx.de> Mime-Version: 1.0 Content-Type: Text/Plain; charset="us-ascii" Content-Transfer-Encoding: 7bit Return-path: In-Reply-To: <1373312807-13227-1-git-send-email-marex-ynQEQJNshbs@public.gmane.org> Sender: linux-i2c-owner-u79uwXL29TY76Z2rM5mHXA@public.gmane.org To: linux-i2c-u79uwXL29TY76Z2rM5mHXA@public.gmane.org Cc: Alexandre Belloni , Fabio Estevam , Lucas Stach , Shawn Guo , Wolfram Sang , to-fleischer-zqRNUXuvxA0b1SvskN2V4Q@public.gmane.org List-Id: linux-i2c@vger.kernel.org Hi, > Analyze and rework the PIO mode operation. The PIO mode operation > was unreliable on MX28, by analyzing the bus with LA, the checks > for when data were available or were to be sent were wrong. > > The PIO WRITE has to be completely reworked as it multiple problems. > The MX23 datasheet helped here, see comments in the code for details. > The problems boil down to: > - RUN bit in CTRL0 must be set after DATA register was written > - The PIO transfer must be 4 bytes long tops, otherwise use > clock stretching. > Both of these fixes are implemented. > > The PIO READ operation can only be done for up to four bytes as > we are unable to read out the data from the DATA register fast > enough. > > This patch also tries to document the investigation within the > code. > > Signed-off-by: Marek Vasut > Cc: Alexandre Belloni > Cc: Fabio Estevam > Cc: Lucas Stach > Cc: Shawn Guo > Cc: Wolfram Sang > Cc: I so far got confirmation from ALexandre this patch works. Can someone else test it please? I'd like to roll out a final version to close this issue. One question remain though -- shall we have the PIO as an experimental feature and disable it by default OR not ? Thanks! Best regards, Marek Vasut