From mboxrd@z Thu Jan 1 00:00:00 1970 From: Marek Vasut Subject: Re: [PATCH 2/3] i2c: mxs: Rework the PIO mode operation Date: Thu, 18 Jul 2013 02:51:41 +0200 Message-ID: <201307180251.41366.marex@denx.de> References: <1374108530-7608-1-git-send-email-marex@denx.de> <1374108530-7608-2-git-send-email-marex@denx.de> Mime-Version: 1.0 Content-Type: Text/Plain; charset="us-ascii" Content-Transfer-Encoding: 7bit Return-path: In-Reply-To: <1374108530-7608-2-git-send-email-marex-ynQEQJNshbs@public.gmane.org> Sender: linux-i2c-owner-u79uwXL29TY76Z2rM5mHXA@public.gmane.org To: linux-i2c-u79uwXL29TY76Z2rM5mHXA@public.gmane.org Cc: Alexandre Belloni , Christoph Baumann , Fabio Estevam , Shawn Guo , Torsten Fleischer , Wolfram Sang List-Id: linux-i2c@vger.kernel.org Dear Marek Vasut, > Analyze and rework the PIO mode operation. The PIO mode operation > was unreliable on MX28, by analyzing the bus with LA, the checks > for when data were available or were to be sent were wrong. > > The PIO WRITE has to be completely reworked as it multiple problems. > The MX23 datasheet helped here, see comments in the code for details. > The problems boil down to: > - RUN bit in CTRL0 must be set after DATA register was written > - The PIO transfer must be 4 bytes long tops, otherwise use > clock stretching. > Both of these fixes are implemented. > > The PIO READ operation can only be done for up to four bytes as > we are unable to read out the data from the DATA register fast > enough. > > This patch also tries to document the investigation within the > code. > > Signed-off-by: Marek Vasut > Cc: Alexandre Belloni > Cc: Christoph Baumann > Cc: Fabio Estevam > Cc: Shawn Guo > Cc: Torsten Fleischer > Cc: Wolfram Sang Please discard that previous submission, looks like I'm still not at home on my new laptop and some of the email addresses got corrupted. This one shall be OK. I appologize for the double-post. Best regards, Marek Vasut