Re: i2c-mpc.c clock/speed

[Anatolij Gustschin <agust-ynQEQJNshbs@public.gmane.org>]

Hi Roland,

On Wed, 05 Mar 2014 10:29:28 +0100
Roland Stigge <stigge-uj/7R2tJ6VmzQB+pC5nmwQ@public.gmane.org> wrote:

> Hi,
> 
> in mpc_i2c_get_fdr_8xxx(), we have:
> 
> ...
> if (of_device_is_compatible(node, "fsl,mpc8544-i2c"))
> 	prescaler = mpc_i2c_get_sec_cfg_8xxx() ? 3 : 2;
> if (!prescaler)
> 	prescaler = 1;
> ...
> 
> By restricting to "fsl,mpc8544-i2c", measured I2C speed on fsl p2020 is
> only half as fast as configured (w/ prescaler = 1).
> 
> In DT (arch/powerpc/boot/dts/fsl/pq3-i2c-0.dtsi), we have "fsl-i2c"
> (i.e., generic), for Freescale boards.
> 
> What would be the best solution here? Additional "compatible" strings,
> e.g. "fsl,p1020-i2c" and adjusting i2c-mpc.c and DT? Or removing the
> restriction to "fsl,mpc8544-i2c", i.e. calling
> mpc_i2c_get_sec_cfg_8xxx() unconditionally?

we can't remove this mpc8544e specific check here, it checks the SEC_CFG
bit 24 in the PORDEVSR2 register, on other mpc8xxx cpus this register is
either not present or the meaning of the bit 24 in this register is
different.

Adding "fsl,p1020-i2c" compatible and adjusting the driver would be
okay. 

Thanks,

Anatolij